Patents by Inventor Peng Lee

Peng Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170055080
    Abstract: A method for audio signal processing and system thereof, the method includes the steps of: obtaining first audio signal information, obtaining second audio signal information, determining an audio parameter based on the first audio signal information and the second audio signal information, modulating the first audio signal information and the second audio signal information based on the audio parameter to generate a first outputting audio signal and a second outputting audio signal.
    Type: Application
    Filed: October 14, 2015
    Publication date: February 23, 2017
    Inventor: Peng LEE
  • Patent number: 9383923
    Abstract: Write pointer management for a disk drive including a disk having a plurality of sectors and a non-volatile memory (NVM) for storing data. Data is sequentially written sector by sector on the disk. The data written in a sector includes a write status indicator indicating that data has been written in the sector. A write pointer is stored on the disk or the NVM as a check-pointed write pointer. The write pointer corresponds to a current sector for writing data on the disk. During a write pointer recovery process, the check-pointed write pointer is retrieved, and at least one write status indicator is scanned in a range of sectors from the sector corresponding to the retrieved check-pointed write pointer and a last sector to identify the current sector for writing data. The write pointer is set to correspond to the identified current sector.
    Type: Grant
    Filed: October 26, 2012
    Date of Patent: July 5, 2016
    Assignee: Western Digital Technologies, Inc.
    Inventors: James N. Malina, Joo Peng Teh, Sang Huynh, Carl E. Barlow, Robert M. Fallone, William B. Boyle, Glenn Cheng, Kuang Hwa Teo, Peng Lee Liang, Daniel D. Reno
  • Publication number: 20160132619
    Abstract: An energy management apparatus, energy management method, and non-transitory tangible computer readable medium thereof are provided. The energy management apparatus receives a plurality of first operation data and environment data, derives a plurality of simulated energy data through energy simulation based on the first operation data and the environment data, calculates an error value between a real environment value and a simulated environment value of the simulated energy data, decides a simulation objective value according to the error value, and decides a plurality of second operation data through energy simulation based on a search algorithm and the simulation objective value. The first operation data correspond to a first time interval, each of the first operation data corresponds to one of a plurality of devices, and the second operation data correspond to a second time interval, and each of the second operation data corresponds to one of the devices.
    Type: Application
    Filed: November 24, 2014
    Publication date: May 12, 2016
    Inventors: Kuei-Peng LEE, Te-Ang CHENG, Yen-Cheng CHI
  • Publication number: 20160049934
    Abstract: A one-shot circuit that includes a fixed-voltage generating module, a clock-shifting module and a logic operation module is provided. The fixed-voltage generating module is operated according to a system voltage to generate a fixed voltage smaller than the system voltage and not varied accordingly. The clock-shifting module includes a delay circuit and at least one first inverter. The delay circuit receives and delays a clock signal to generate a first delayed clock signal. The first inverter is electrically connected to the delay circuit to be operated according to the fixed voltage to receive the first delayed clock signal and generate a second delayed clock signal that is delayed for a predetermined time period relative to the clock signal. The logic operation module receives the clock signal and the second delayed clock signal to perform a logic operation to generate a one-shot signal.
    Type: Application
    Filed: August 15, 2014
    Publication date: February 18, 2016
    Inventor: Chow-Peng LEE
  • Publication number: 20160049864
    Abstract: The soft-start circuit includes a first charging transistor, a first capacitor, a second charging transistor, a second capacitor and a clamping p-type transistor. The first charging transistor is conducted in response to activating pulses to charge the first capacitor through a first output node such that a first output voltage at the first output node gradually increases. The second charging transistor is conducted in response to the first output voltage to charge the second capacitor through a second output node such that a second output voltage at the second output node gradually increases. The clamping p-type transistor includes a source terminal electrically connected to a clamping node, a drain terminal connected to a ground terminal and a gate electrically connected to the second output node, and is conducted when a voltage at the clamping node exceeds a clamping threshold value to pull low the voltage at the clamping node.
    Type: Application
    Filed: August 15, 2014
    Publication date: February 18, 2016
    Inventor: Chow-Peng LEE
  • Patent number: 9257898
    Abstract: The soft-start circuit includes a first charging transistor, a first capacitor, a second charging transistor, a second capacitor and a clamping p-type transistor. The first charging transistor is conducted in response to activating pulses to charge the first capacitor through a first output node such that a first output voltage at the first output node gradually increases. The second charging transistor is conducted in response to the first output voltage to charge the second capacitor through a second output node such that a second output voltage at the second output node gradually increases. The clamping p-type transistor includes a source terminal electrically connected to a clamping node, a drain terminal connected to a ground terminal and a gate electrically connected to the second output node, and is conducted when a voltage at the clamping node exceeds a clamping threshold value to pull low the voltage at the clamping node.
    Type: Grant
    Filed: August 15, 2014
    Date of Patent: February 9, 2016
    Assignee: HIMAX ANALOGIC, INC.
    Inventor: Chow-Peng Lee
  • Patent number: 9246490
    Abstract: A one-shot circuit that includes a fixed-voltage generating module, a clock-shifting module and a logic operation module is provided. The fixed-voltage generating module is operated according to a system voltage to generate a fixed voltage smaller than the system voltage and not varied accordingly. The clock-shifting module includes a delay circuit and at least one first inverter. The delay circuit receives and delays a clock signal to generate a first delayed clock signal. The first inverter is electrically connected to the delay circuit to be operated according to the fixed voltage to receive the first delayed clock signal and generate a second delayed clock signal that is delayed for a predetermined time period relative to the clock signal. The logic operation module receives the clock signal and the second delayed clock signal to perform a logic operation to generate a one-shot signal.
    Type: Grant
    Filed: August 15, 2014
    Date of Patent: January 26, 2016
    Assignee: HIMAX ANALOGIC, INC.
    Inventor: Chow-Peng Lee
  • Patent number: 9203390
    Abstract: A test mode activation circuit that includes a clock signal generating module, a resistor-capacitor circuit, a current generating module, an output capacitor and a comparator is provided. The clock signal generating module generates a clock signal to an input node such that the resistor-capacitor circuit electrically connected to the input node receives the clock signal to generate a triggering signal every predetermined time interval. The current generating module generates a charging current to an output node in response to the triggering signal. The output capacitor receives the charging current from the output node such that an output voltage of the output node gradually increases. The comparator receives the output voltage from the output node and a reference voltage, wherein the comparator compares the output voltage and the reference voltage to generate a test mode activation signal when the output voltage is larger than the reference voltage.
    Type: Grant
    Filed: August 15, 2014
    Date of Patent: December 1, 2015
    Assignee: HIMAX ANALOGIC, INC.
    Inventor: Chow-Peng Lee
  • Patent number: 9042066
    Abstract: An output stage with short-circuit protection includes a power transistor, a detecting module, a disable module, and a driving module. The power transistor is electrically connected between a voltage source and an output node. A gate end of the power transistor is configured to receive a driving signal. The detecting module is configured to detect an output voltage on the output node to determine whether a short-circuit condition occurs, and to provide a detecting signal according to the output voltage on the output node in the short-circuit condition. The disable module is configured to provide a disable signal according to the detecting signal in the short-circuit condition, and operatively stop the disable signal in each cycle period of a clock signal. The driving module is configured to determine whether to generate the driving signal according to the disable signal and the clock signal.
    Type: Grant
    Filed: September 26, 2013
    Date of Patent: May 26, 2015
    Assignee: HIMAX ANALOGIC, INC.
    Inventor: Chow-Peng Lee
  • Publication number: 20150096917
    Abstract: A lubrication oil fine-tuning device includes a tank having a nano electromagnetic wave coating coated on the outside of the tank. The nano electromagnetic wave coating fine-tunes the lubrication oil particles and the lubrication oil is circulated between parts to smooth the operation of the parts and saves expense of the fuel.
    Type: Application
    Filed: October 8, 2013
    Publication date: April 9, 2015
    Inventor: Yu-Peng LEE
  • Publication number: 20150085414
    Abstract: An output stage with short-circuit protection includes a power transistor, a detecting module, a disable module, and a driving module. The power transistor is electrically connected between a voltage source and an output node. A gate end of the power transistor is configured to receive a driving signal. The detecting module is configured to detect an output voltage on the output node to determine whether a short-circuit condition occurs, and to provide a detecting signal according to the output voltage on the output node in the short-circuit condition. The disable module is configured to provide a disable signal according to the detecting signal in the short-circuit condition, and operatively stop the disable signal in each cycle period of a clock signal. The driving module is configured to determine whether to generate the driving signal according to the disable signal and the clock signal.
    Type: Application
    Filed: September 26, 2013
    Publication date: March 26, 2015
    Applicant: Himax Analogic, Inc.
    Inventor: Chow-Peng Lee
  • Patent number: 8849285
    Abstract: A method for reducing the handover frequency by a communication device in femtocell networks includes the steps: measuring the radio signal strength by a communication device and storing the information of the serving base station into a cache memory; checking whether the stored information in the cache memory is classified as “femtocell” or not; if so, deleting the macrocell's information from the measurement report by the communication device and transmitting this to the serving base station; when the radio link failure occurred, checking whether the stored information in the cache memory is classified as “femtocell” or not; if so, initiating a timer; detecting an available femtocell before the timer expires; transmitting a call reestablishment request message to the available femtocell for rebuilding the link.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: September 30, 2014
    Assignee: National Tsing Hua University
    Inventors: Phone Lin, Chia-Peng Lee, Chin-Liang Wang, Whai-En Chen
  • Patent number: 8843779
    Abstract: A disk drive including a disk surface including a first backup location, and a second backup location, a head actuated radially over the disk surface to write data to the disk surface, a memory configured to store a signature, and control circuitry coupled to the head. The control circuitry can be configured to receive a command to write data to the disk surface, insert the signature into the data, write the data to the disk surface, and alternately writing a spare copy of the data to the first backup location and to the second backup location based on a value of the signature.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: September 23, 2014
    Assignee: Western Digital Technologies, Inc.
    Inventors: Chin Phan Kuan, Noppol Vangnayunut, Nikki Poh Ling Khew, Peng Lee Liang
  • Publication number: 20140273197
    Abstract: A vibratable culture apparatus includes a culture device and a vibrating device having a driving module and a vibrating module. The vibrating module has a working platform connected to the driving module, a plurality of lighting units installed on the working platform, and a plurality of positioning units. The working platform is vibratable in a plane by the driving module. Each lighting unit has a first LED set used and a second LED set. The positioning units are installed on the working platform and respectively arranged adjacent to the lighting units. The culture device is detachably disposed on the working platform and restricted by at least partial the positioning units for maintaining the relative position between the culture device and the working platform. The culture device is arranged above at least partial the lighting units that used for emitting light to penetrate into the culture device.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Applicant: CASHIDO CORPORATION
    Inventors: SHIH-CHANG CHEN, CHUN-LUNG CHIU, CHIH-HSIANG CHEN, YUAN-PENG LEE, PO-HUNG LAI, I-CHIAO LIN, PUNG-LING HUANG, YI-YIN DO, CHENG-KU LIN
  • Patent number: 8804336
    Abstract: A heat dissipating apparatus includes a centrifugal fan, a heat sink and a heat pipe. The centrifugal fan includes a frame and an air outlet defined on the frame. The heat sink is arranged adjacent to the air outlet of the centrifugal fan. The heat pipe includes an evaporation section and a condensation section extending from the evaporation section. The condensation section is connected to the heat sink. The evaporation section is for absorbing heat from a first and second heat generating component. The frame includes an elastic plate abutting to the evaporation section of the heat pipe and applying a force to the evaporation section of the heat pipe. An electronic device equipped with the heat dissipating apparatus is also provided.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: August 12, 2014
    Assignee: Foxconn Technology Co., Ltd.
    Inventor: Chih-Peng Lee
  • Patent number: 8764052
    Abstract: An airbag device includes an airbag main body, a storing section, an airbag lid member, a hinge section and a protective member. The airbag lid member has a lid section and an opening section. The lid section is configured to be opened by a pressing force of the airbag main body. The opening section is formed when the lid section is opened. The hinge section couples an edge portion of the opening section and the lid section. The protective member is configured and arranged to be disposed between the airbag main body and the hinge section when the airbag main body expands, and has a main protective section and a peripheral portion protective section. The peripheral portion protective section is provided on both sides of the main protective section to cover at least a peripheral portion of the lid section which protrudes from both sides of the hinge section.
    Type: Grant
    Filed: September 9, 2013
    Date of Patent: July 1, 2014
    Assignees: Calsonic Kansei Corporation, Calsonic Kansei North America, Inc.
    Inventors: Kazuki Funakura, Tomiharu Yamada, Koutarou Yamanaka, Naotoshi Ota, Marius Cociuba, Peng Lee
  • Patent number: D713444
    Type: Grant
    Filed: June 24, 2014
    Date of Patent: September 16, 2014
    Assignee: Neckglasses, LLC
    Inventors: Peng Lee, Karen June Ganovsky, Dianna Varner Seddon
  • Patent number: D750155
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: February 23, 2016
    Assignee: Neckglasses, LLC
    Inventors: Karen June Ganovsky, Peng Lee, Dianna Varner Seddon
  • Patent number: D774122
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: December 13, 2016
    Assignee: Neckglasses, LLC
    Inventors: Karen June Ganovsky, Dianna Varner Seddon, Peng Lee
  • Patent number: D777825
    Type: Grant
    Filed: April 9, 2016
    Date of Patent: January 31, 2017
    Assignee: Neckglasses, LLC
    Inventors: Karen June Ganovsky, Peng Lee, Dianna Varner Seddon