Abstract: A display substrate and a display panel are disclosed. The display substrate includes a base substrate having an active area and a peripheral area surrounding the active area; a plurality of sub-pixels, in the active area; a plurality of first pins and a plurality of second pins located in the peripheral area; a plurality of first array test pins located between the plurality of first pins and the plurality of second pins and respectively electrically coupled to a plurality of array test signal lines; and a plurality of second array test pins located between the plurality of first pins and the plurality of second pins and extending in a direction along a boundary of the active area, wherein the plurality of first array test pins are located on at least one side of the plurality of second array test pins in the direction along the boundary of the active area.

Abstract: This disclosure discloses a display panel and a display apparatus. The display panel includes: a substrate, wherein the substrate has a display region and a border region surrounding the display region; the border region includes a first power voltage line and a first planarization layer sequentially stacked on a side of the substrate; the border region has a first dam region surrounding the display region and a second dam region surrounding the first dam region; an orthographic projection of the first power voltage line on the substrate is within the first dam region; the first planarization layer is at least within the first dam region and the second dam region, and the first planarization layer within the first dam region at least covers a side surface of the first power voltage line; and the first planarization layer has a first groove and a second groove.

Abstract: A frequency locking method for a phase-locked loop comprises the following steps: S1, a frequency control module controls a numerically controlled oscillator to obtain an maximum output frequency and a minimum output frequency; S2, obtain a minimum frequency ratio and a maximum frequency ratio by means of a time-to-digital converter and the frequency control module; S3, calculate a first frequency control word and a first frequency ratio according to the minimum frequency ratio and the maximum frequency ratio; S4, the frequency control module uses the Newton's iterative method to recalculate a new frequency control word; S5, obtain a new frequency ratio according to the new frequency control word; S6, if the new frequency ratio is within an error range, end iteration and stably output the new frequency control word, and otherwise, jump to step S4.

Abstract: A display panel is provided. The display panel includes a display part; and a fanout part. The display part includes a plurality of pixel driving circuits. The fanout part includes a bendable portion and a multiplexer. The display panel includes a plurality of first signal lines extending through the bendable portion, and connecting the plurality of pixel driving circuits to the multiplexer. A direct current supply line extending through the bendable portion and electrically connected to the plurality of pixel driving circuits. A portion of the direct current supply line is between the multiplexer and the bendable portion and crosses over the plurality of first signal lines.

Abstract: A method of operating an electric power system, which may include: determining a charge state of a first battery unit and a charge state of a second battery unit; determining a difference between the charge state of the first battery unit and the charge state of the second battery unit; and determining whether to enable discharging simultaneously of both the first battery unit and the second battery unit, or to enable discharging of one of the first and second battery units, based on the difference between the charge state of the first battery unit and the charge state of the second battery unit. At least one of the first and second battery units may be a swappable battery unit. The disclosure further relates to an electric power system and to a computer executable code including instructions for operating an electric power system.

Abstract: A method of operating an electric power system, which may include: determining a charge state of a first battery unit and a charge state of a second battery unit; determining a difference between the charge state of the first battery unit and the charge state of the second battery unit; and determining whether to enable discharging simultaneously of both the first battery unit and the second battery unit, or to enable discharging of one of the first and second battery units, based on the difference between the charge state of the first battery unit and the charge state of the second battery unit. At least one of the first and second battery units may be a swappable battery unit. The disclosure further relates to an electric power system and to a computer executable code including instructions for operating an electric power system.

Abstract: A display panel includes a plurality of sub-pixels and a plurality of data lines, and a detection circuit. The data lines include at least one first data line. The detection circuit includes a first detection signal line, a detection control signal line, and at least one first switch. The first detection signal line and the detection control signal line detour along an edge of the active area. The first detection signal line is configured to transmit a detection signal, and the detection control signal line is configured to transmit a detection control signal. The first switch is electrically connected to the first detection signal line, the detection control signal line, and the at least one first data line, and is configured to close a line between the first detection signal line and the first data line, in response to the detection control signal.

Abstract: A display driving module includes a gate driving circuit, a plurality of data lines and a data driving circuit. The pixel circuits in odd-numbered rows and one column are electrically connected to a data line, and the pixel circuits in even-numbered rows and the one column are electrically connected to another data line. The data driving circuit includes a data driver and a multiplexing circuit, the multiplexing circuit includes a first multiplexing sub-circuit and a second multiplexing sub-circuit. The gate driving circuit includes a plurality of levels of shift register units, and an nth-level shift register unit is electrically connected to the pixel circuits in a (2n?1)th row and a (2n)th row, and configured to apply a same gate driving signal to the pixel circuits in the (2n?1)th row and the (2n)th row, where n is a positive integer.

Abstract: A display substrate includes a scanning driving circuit arranged on a base substrate. The scanning driving circuit includes a plurality of shift register units and a first voltage signal line extending in a first direction. At least one shift register unit includes an output capacitor and a first transistor, a first electrode thereof is coupled to the first voltage signal line, and a second electrode thereof is coupled to an electrode plate of the output capacitor. A maximum distance between an orthogonal projection of the first electrode/second electrode of the first transistor onto the base substrate and an orthogonal projection of the first voltage signal line/the electrode plate of the output capacitor onto the base substrate is smaller than a first/second predetermined distance in a second direction, and the first direction intersects the second direction.

Abstract: A liquid crystal display panel, including a display body, a lower polarizer, and a backlight plate. The display body includes a light transmission hole, the backlight plate includes a light shielding plate connected to the display body, the light shielding plate is provided with a first through hole coaxial with the light transmission hole; wherein the display body is provided with an annular shielding member located in the first through hole, the annular shielding member is provided with a second through hole coaxial with the light transmission hole, a diameter of the second through hole is greater than or equal to a diameter of the light transmission hole.

Abstract: Provided is a display substrate, which includes a substrate, a plurality of sub-pixels, a plurality of data lines, a plurality of signal input pads, a data fan-out line layer, and a plurality of resistance compensation units. The substrate includes a display region and a bezel region located region on a periphery of the display region, and the bezel region includes a signal access region located on a side of the display region and a fan-out region located between the display region and the signal access region. The data fan-out line layer and the plurality of resistance compensation units are disposed in the fan-out region, and the data fan-out line layer includes a plurality of data fan-out lines. At least one resistance compensation unit includes a semiconductor structure. At least one data fan-out line is connected in series with and electrically connected to at least one resistance compensation unit.

Abstract: A display substrate includes a substrate, at least one inorganic film, metal film(s) and organic film(s), the at least one inorganic film is disposed on the substrate; at least one edge portion of the entire at least one inorganic film is step-shaped. The metal film(s) are disposed on a side of the at least one inorganic film facing away from the substrate. A metal film includes a conductive pattern and residual pattern(s), and an orthographic projection of a residual pattern on the substrate is located within an orthographic projection of a step-shaped edge portion of the at least one inorganic film on the substrate. An organic film is disposed on a side of the metal film facing away from the substrate, and an edge portion of the organic film covers the residual pattern of the metal film.

Abstract: A display apparatus and a method for manufacturing the display apparatus are provided. The display apparatus includes: a flexible panel which includes a display region and a non-display region, where the non-display region includes a bending sub-region and a back sub-region connected to the bending sub-region and arranged opposite to the display region, a multiplexer is arranged in the back sub-region; and a shielding electrode layer located on a side of the multiplexer away from the back sub-region, an orthographic projection of the multiplexer onto a plane where the shielding electrode layer is located being within the shielding electrode layer.

Abstract: A video processing method includes: extracting a plurality of video frames from a source video with a first aspect ratio; clipping each of the plurality of video frames multiple times to generate a plurality of candidate clipping boxes with a second aspect ratio; respectively determining scores of the plurality of candidate clipping boxes of each of the plurality of video frames, the scores representing playing effects of the video frames in response to that each of the candidate clipping boxes is taken as a clipping range; selecting a clipping box of each of the video frames from the plurality of candidate clipping boxes based on the scores; and clipping each of the video frames by using the selected clipping box, and generating a target video with the second aspect ratio.

Abstract: A display substrate and manufacturing method thereof, and a display device are provided. The display substrate includes a base substrate, and a shift register unit and a first clock signal line that are on the base substrate, the first clock signal line extends along a first direction on the base substrate and is configured to provide a first clock signal to the shift register unit, the shift register unit includes an input circuit, an output circuit, a first control circuit and an output control circuit, and the input circuit includes an input transistor, an active layer of the input transistor is in a strip shape extending along a second direction, and the second direction is different from the first direction.

Abstract: A display substrate, a manufacturing method and a display device are provided. The display substrate includes a scan driving circuit; the scan driving circuit includes a plurality of shift register units, at least one shift register unit includes a signal output line and an output circuit, the output circuit includes an output transistor and an output reset transistor; the signal output line includes a first output line portion extending along the first direction; the first output line portion is coupled to the second electrode of the output transistor or the output reset transistor through a plurality of first or second signal line via holes arranged in a signal line overlap area, and the plurality of first or second signal line via holes are arranged along the first direction.

Abstract: A display substrate includes a scanning driving circuit arranged on a base substrate. The scanning driving circuit includes a plurality of shift register units and a first voltage signal line extending in a first direction. At least one shift register unit includes an output capacitor and a first transistor, a first electrode thereof is coupled to the first voltage signal line, and a second electrode thereof is coupled to an electrode plate of the output capacitor. A maximum distance between an orthogonal projection of the first electrode/second electrode of the first transistor onto the base substrate and an orthogonal projection of the first voltage signal line/the electrode plate of the output capacitor onto the base substrate is smaller than a first/second predetermined distance in a second direction, and the first direction intersects the second direction.

Abstract: A display substrate and a display device are provided. The display substrate includes repeating units, each repeating unit includes one first color sub-pixel, one second color sub-pixel pair and one third color sub-pixel, the second color sub-pixel pair includes two second color sub-pixels. In each repeating unit, a distance, along the first direction, between a center of the third color sub-pixel and a center of the second color sub-pixel pair is a first distance; two adjacent repeating units located in a same repeating unit group include a first repeating unit and a second repeating unit, a distance between a center of a second color sub-pixel pair in a third repeating unit adjacent to both the first repeating unit and the second repeating unit and a center of a third color sub-pixel in the first repeating unit is a second distance, and the first distance is different from the second distance.

Abstract: A display substrate and a display device are provided. The display substrate includes: a base substrate, a pixel driving circuit layer, a first planarization layer, an anode layer, a light emitting functional layer, and a spacer. The first planarization layer includes a first via hole, the anode layer includes a first anode and a second anode, the first anode includes a first main body portion and a first connection portion, the second anode includes a second main body portion and a second connection portion, the spacer is located between the first and second main body portions in adjacent anode group rows. An overlapping area between the spacer and the first via hole is less than 20% of an area of the first via hole.

Abstract: A display substrate and a display apparatus. In the display substrate, at least one of the inter-opening region, the first opening peripheral region and the second opening peripheral region includes a virtual sub-pixel; the display region surrounds these three regions; the first signal line passes through the inter-opening region, provides a display signal to the pixel array and passes through the virtual sub-pixel the virtual pixel circuit of the virtual sub-pixel includes a compensation capacitor. The first electrode plate of the compensation capacitor is in the same layer as the first signal line and electrically connected with the first signal line; the second electrode plate of the compensation capacitor is in a different layer from and at least partially overlaps with the first electrode plate.