Patents by Inventor Peter Capofreddi

Peter Capofreddi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9170593
    Abstract: Devices and methods are provided for generating a regulated output voltage with improved line rejection based on an input voltage and a reference voltage. The device may include a pass transistor and a replica transistor, wherein source ports of the pass transistor and the replica transistor are coupled to the input voltage, a drain port of the pass transistor is coupled to the output voltage, and a gate port of the pass transistor is coupled to a gate port of the replica transistor. The device may further include a coupling circuit configured to couple current from the drain port of the replica transistor to the gate port of the replica transistor, the coupling circuit further configured to control voltage on the drain port of the replica transistor based on the reference voltage.
    Type: Grant
    Filed: May 16, 2013
    Date of Patent: October 27, 2015
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Peter Capofreddi
  • Publication number: 20140340060
    Abstract: Devices and methods are provided for generating a regulated output voltage with improved line rejection based on an input voltage and a reference voltage. The device may include a pass transistor and a replica transistor, wherein source ports of the pass transistor and the replica transistor are coupled to the input voltage, a drain port of the pass transistor is coupled to the output voltage, and a gate port of the pass transistor is coupled to a gate port of the replica transistor. The device may further include a coupling circuit configured to couple current from the drain port of the replica transistor to the gate port of the replica transistor, the coupling circuit further configured to control voltage on the drain port of the replica transistor based on the reference voltage.
    Type: Application
    Filed: May 16, 2013
    Publication date: November 20, 2014
    Inventor: Peter Capofreddi
  • Patent number: 8774738
    Abstract: Embodiments of the present disclosure provide systems and methods for estimating gain and phase error in a wireless transmitter. Embodiments of the present disclosure provide a gain and phase controller that uses a digital gain and phase estimator to jointly estimate both gain and phase. The forward and feedback signals of a wireless transmitter are digitized using analog to digital (ADC) converters. The digital signals are correlated with each other to dynamically extract gain and phase estimates of the loop. The gain and phase estimates are used to correct gain and phase errors in the wireless transmitter.
    Type: Grant
    Filed: April 20, 2012
    Date of Patent: July 8, 2014
    Assignee: Broadcom Corporation
    Inventors: Sriraman Dakshinamurthy, Mohamed Mostafa, Derek Shaeffer, Dennis Pu, Peter Capofreddi
  • Publication number: 20130320954
    Abstract: Devices, systems and methods are provided for a switched-mode voltage converter system with energy recovery. The device may include a first voltage converter circuit including a boost voltage node and an output voltage port coupled to a load. The first voltage converter circuit configured to deliver energy from the boost voltage node to the load in a first mode, and to deliver energy from the load to the boost voltage node in a second mode. The device may also include a second voltage converter circuit coupled to an energy source and to the boost voltage node, the second voltage converter circuit configured to convert a first voltage associated with the energy source to a second voltage associated with the boost voltage node.
    Type: Application
    Filed: May 6, 2013
    Publication date: December 5, 2013
    Applicant: Fairchild Semiconductor Corporation
    Inventors: Peter Capofreddi, Timothy Alan Dhuyvetter, Nicholas Stinson
  • Patent number: 8503952
    Abstract: A method and apparatus of compensating for an asymmetric frequency response of a radio are disclosed. One method includes estimating a slope control signal, the slope control signal indicating a slope of a frequency response of an amplifier chain of the radio. A difference between gain at positive frequencies and gain at negative frequencies of a complex baseband signal is adjusted with the slope control signal, wherein the complex signal includes an I component and a Q component. The adjusted complex baseband signal is frequency up-converted into a radio signal. The radio signal is amplified by the amplifier chain. The amplified radio signal is transmitted.
    Type: Grant
    Filed: April 10, 2008
    Date of Patent: August 6, 2013
    Assignee: Broadcom Corporation
    Inventors: Peter Capofreddi, Sriraman Dakshinamurthy, Derek Shaeffer
  • Publication number: 20120270511
    Abstract: Embodiments of the present disclosure provide systems and methods for estimating gain and phase error in a wireless transmitter. Embodiments of the present disclosure provide a gain and phase controller that uses a digital gain and phase estimator to jointly estimate both gain and phase. The forward and feedback signals of a wireless transmitter are digitized using analog to digital (ADC) converters. The digital signals are correlated with each other to dynamically extract gain and phase estimates of the loop. The gain and phase estimates are used to correct gain and phase errors in the wireless transmitter.
    Type: Application
    Filed: April 20, 2012
    Publication date: October 25, 2012
    Applicant: Broadcom Corporation
    Inventors: Sriraman DAKSHINAMURTHY, Mohamed Mostafa, Derek Shaeffer, Dennis Pu, Peter Capofreddi
  • Publication number: 20090258615
    Abstract: A method and apparatus of compensating for an asymmetric frequency response of a radio are disclosed. One method includes estimating a slope control signal, the slope control signal indicating a slope of a frequency response of an amplifier chain of the radio. A difference between gain at positive frequencies and gain at negative frequencies of a complex baseband signal is adjusted with the slope control signal, wherein the complex signal includes an I component and a Q component. The adjusted complex baseband signal is frequency up-converted into a radio signal. The radio signal is amplified by the amplifier chain. The amplified radio signal is transmitted.
    Type: Application
    Filed: April 10, 2008
    Publication date: October 15, 2009
    Inventors: Peter Capofreddi, Sriraman Dakshinamurthy, Derek Shaeffer
  • Patent number: 7308032
    Abstract: A method and a device for spectrally shaping nonlinear intersymbol interference (NLISI) in an oversampling digital-to-analog converter are disclosed. At least one higher-order shaper circuit is provided, so as to shape NLISI, causing energy associated with NLISI to fall outside a signal band. The signal-to-noise ratio achieved is better than signal-to-noise rations obtained in prior art NLISI reducing methods and devices.
    Type: Grant
    Filed: December 31, 2003
    Date of Patent: December 11, 2007
    Assignee: HRL Laboratories, LLC
    Inventor: Peter Capofreddi
  • Patent number: 7295068
    Abstract: A transconductance cell is disclosed that includes a first transistor and a second transistor. A regulator regulates an average voltage in response to a reference voltage, where the average voltage corresponds to the average of a voltage at a bias terminal of the first transistor and a voltage at a bias terminal of the second transistor. A mixer including the transconductance cell is also disclosed. In the mixer, the transconductance cell receives a differential input voltage and produces a differential output current. The mixer also includes one or more switches that multiply the differential output current with an oscillator signal. A method is disclosed that includes measuring an average voltage of a voltage at a bias terminal of a first transistor and a voltage at a bias terminal of a second transistor and regulating the average voltage responsive to the measured average voltage and a reference voltage.
    Type: Grant
    Filed: May 19, 2005
    Date of Patent: November 13, 2007
    Assignee: Beceem Communications Inc.
    Inventors: Peter Capofreddi, Arvin Ramesh Shahani, Derek Shaeffer, Korhan Titizer
  • Patent number: 7164313
    Abstract: Circuits, methods, and systems are provided for opening a primary feedback loop in a transmitter. An auxiliary feedback loop can be closed when the primary feedback loop is opened, and a controller can match a gain of the primary feedback loop to another gain in the transmitter.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: January 16, 2007
    Assignee: Aspendos Communications
    Inventors: Peter Capofreddi, Derek K. Shaeffer, Sriraman Dakshinamurthy, Korhan Titizer
  • Publication number: 20060261894
    Abstract: A transconductance cell is disclosed that includes a first transistor and a second transistor. A regulator regulates an average voltage in response to a reference voltage, where the average voltage corresponds to the average of a voltage at a bias terminal of the first transistor and a voltage at a bias terminal of the second transistor. A mixer including the transconductance cell is also disclosed. In the mixer, the transconductance cell receives a differential input voltage and produces a differential output current. The mixer also includes one or more switches that multiply the differential output current with an oscillator signal. A method is disclosed that includes measuring an average voltage of a voltage at a bias terminal of a first transistor and a voltage at a bias terminal of a second transistor and regulating the average voltage responsive to the measured average voltage and a reference voltage.
    Type: Application
    Filed: May 19, 2005
    Publication date: November 23, 2006
    Applicant: Aspendos Communications
    Inventors: Peter Capofreddi, Arvin Shahani, Derek Shaeffer, Korhan Titizer
  • Patent number: 7132885
    Abstract: A circuit is provided that includes a Cartesian feedback loop. The Cartesian feedback loop includes one or more operational amplifiers. At least one of the operational amplifiers includes two or more cascaded amplifier stages and one or more bypass amplifier stages. The bypass amplifier stages are connected in parallel with the cascaded amplifier stages.
    Type: Grant
    Filed: March 23, 2005
    Date of Patent: November 7, 2006
    Assignee: Aspendos Communications
    Inventors: Peter Capofreddi, Derek K. Shaeffer, Korhan Titizer
  • Publication number: 20060226901
    Abstract: A circuit is provided that includes a Cartesian feedback loop. The Cartesian feedback loop includes one or more operational amplifiers. At least one of the operational amplifiers includes two or more cascaded amplifier stages and one or more bypass amplifier stages. The bypass amplifier stages are connected in parallel with the cascaded amplifier stages.
    Type: Application
    Filed: March 23, 2005
    Publication date: October 12, 2006
    Inventors: Peter Capofreddi, Derek Shaeffer, Korhan Titizer
  • Publication number: 20060103462
    Abstract: Circuits, methods, and systems are provided for opening a primary feedback loop in a transmitter. An auxiliary feedback loop can be closed when the primary feedback loop is opened, and a controller can match a gain of the primary feedback loop to another gain in the transmitter.
    Type: Application
    Filed: November 12, 2004
    Publication date: May 18, 2006
    Inventors: Peter Capofreddi, Derek Shaeffer, Sriraman Dakshinamurthy, Korhan Titizer
  • Publication number: 20050141659
    Abstract: A method and a device for spectrally shaping nonlinear intersymbol interference (NLISI) in an oversampling digital-to-analog converter are disclosed. At least one higher-order shaper circuit is provided, so as to shape NLISI, causing energy associated with NLISI to fall outside a signal band. The signal-to-noise ratio achieved is better than signal-to-noise rations obtained in prior art NLISI reducing methods and devices.
    Type: Application
    Filed: December 31, 2003
    Publication date: June 30, 2005
    Inventor: Peter Capofreddi
  • Patent number: 6703892
    Abstract: An apparatus for coupling a wideband current signal between two different potentials. The apparatus incorporates a capacitor for providing a signal path for a high frequency signal from a first potential to a second potential. The apparatus further incorporates a current mirror for providing a signal path to a low frequency signal from the first potential to the second potential.
    Type: Grant
    Filed: September 6, 2002
    Date of Patent: March 9, 2004
    Assignee: Santel Networks, Inc.
    Inventors: Peter Capofreddi, Anu Pisipaty
  • Patent number: 6553398
    Abstract: An analog FIR filter that processes multiple output samples in parallel is disclosed. The simultaneous parallel processing of multiple samples permits improved sampling rate and improved accuracy as compared to prior art filters.
    Type: Grant
    Filed: September 19, 2001
    Date of Patent: April 22, 2003
    Assignee: Santel Networks, Inc.
    Inventor: Peter Capofreddi
  • Patent number: 6542104
    Abstract: An improved thermometer-to-binary coder in which the bits of the thermometer code are used to directly generate the binary code without using an intermediate one-hot code.
    Type: Grant
    Filed: October 22, 2001
    Date of Patent: April 1, 2003
    Assignee: Santel Networks, Inc.
    Inventor: Peter Capofreddi
  • Patent number: 6529926
    Abstract: An analog discrete-time filter that processes multiple output samples in parallel is disclosed. The simultaneous parallel processing of multiple samples permits improved sampling rate and improved accuracy as compared to prior art filters.
    Type: Grant
    Filed: September 20, 2000
    Date of Patent: March 4, 2003
    Assignee: Santel Networks, Inc.
    Inventor: Peter Capofreddi
  • Publication number: 20020062329
    Abstract: An analog FIR filter that processes multiple output samples in parallel is disclosed. The simultaneous parallel processing of multiple samples permits improved sampling rate and improved accuracy as compared to prior art filters.
    Type: Application
    Filed: September 19, 2001
    Publication date: May 23, 2002
    Inventor: Peter Capofreddi