Patents by Inventor Peter Chang-Lin Hsieh

Peter Chang-Lin Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of pattern etching a low K dielectric layer
    Patent number: 6331380
    Abstract: A first embodiment of the present invention pertains to a method of patterning a semiconductor device conductive feature while permitting easy removal of any residual masking layer which remains after completion of the etching process. A multi-layered masking structure is used which includes a layer of high-temperature organic-based masking material overlaid by either a patterned layer of inorganic masking material or by a layer of patterned high-temperature imageable organic masking material. The inorganic masking material is used to transfer a pattern to the high-temperature organic-based masking material and is then removed. The high-temperature organic-based masking material is used to transfer the pattern and then may be removed if desired. This method is also useful in the pattern etching of aluminum, even though aluminum can be etched at lower temperatures.
    Type: Grant
    Filed: April 14, 2000
    Date of Patent: December 18, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Yan Ye, Pavel Ionov, Allen Zhao, Peter Chang-Lin Hsieh, Diana Xiaobing Ma, Chun Yan, Jie Yuan
  • Method for high temperature etching of patterned layers using an organic mask stack
    Patent number: 6143476
    Abstract: The present disclosure pertains to a method of patterning a semiconductor device feature which provides for the easy removal of any residual masking layer which remains after completion of a pattern etching process. The method provides for a multi-layered masking structure which includes a layer of high-temperature organic-based masking material overlaid by either a layer of a high-temperature inorganic masking material which can be patterned to provide an inorganic hard mask, or by a layer of high-temperature imageable organic masking material which can be patterned to provide an organic hard mask. The hard masking material is used to transfer a pattern to the high-temperature organic-based masking material, and then the hard masking material is removed. The high-temperature organic-based masking material is used to transfer the pattern to an underlying semiconductor device feature.
    Type: Grant
    Filed: December 12, 1997
    Date of Patent: November 7, 2000
    Assignee: Applied Materials Inc
    Inventors: Yan Ye, Allen Zhao, Peter Chang-Lin Hsieh, Diana Xiaobing Ma
  • Method of etching patterned layers useful as masking during subsequent etching or for damascene structures
    Patent number: 6080529
    Abstract: A first embodiment of the present invention pertains to a method of patterning a semiconductor device conductive feature while permitting easy removal of any residual masking layer which remains after completion of the etching process. A multi-layered masking structure is used which includes a layer of high-temperature organic-based masking material overlaid by either a patterned layer of inorganic masking material or by a layer of patterned high-temperature imageable organic masking material. The inorganic masking material is used to transfer a pattern to the high-temperature organic-based masking material and is then removed. The high-temperature organic-based masking material is used to transfer the pattern and then may be removed if desired. This method is also useful in the pattern etching of aluminum, even though aluminum can be etched at lower temperatures.
    Type: Grant
    Filed: October 19, 1998
    Date of Patent: June 27, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Yan Ye, Pavel Ionov, Allen Zhao, Peter Chang-Lin Hsieh, Diana Xiaobing Ma, Chun Yan, Jie Yuan