Patents by Inventor Peter Costello

Peter Costello has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11142648
    Abstract: A method of treating particulate titanium dioxide includes providing the particulate titanium dioxide which includes a crystal structure and then treating the particulate titanium dioxide with a coating agent that is an alkylphosphonic acid or an ester thereof, and steam micronizing the particulate titanium dioxide with a steam micronizer so that a vapor exit temperature from the steam micronizer is 150° C. or higher, so as to obtain a micronized particulate titanium dioxide which includes the coating agent at an outer surface. The particulate titanium dioxide includes an aluminum oxide coating and/or includes within the crystal structure aluminum oxide in a molar excess of an amount required to compensate any Nb2O5 in the crystal structure. The alkylphosphonic acid includes a C6-C22 alkyl group.
    Type: Grant
    Filed: September 23, 2016
    Date of Patent: October 12, 2021
    Assignee: HUNTSMAN P&A UK LIMITED
    Inventors: Anthony G. Jones, David Williamson, Peter Costello, John L. Edwards
  • Patent number: 10668226
    Abstract: A flow sensor is provided to enable volumetric dose data to be acquired automatically by sampling flow rates of insulin measured by a flow sensor exposed to a flow manifold though which the insulin flows. The flow sensor preferably connects to a standard insulin pen on one end, and to a standard pen needle on the other end. Particular geometries and algorithms are utilized to accommodate the unique requirements of insulin flow determination during an injection event.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: June 2, 2020
    Assignee: BECTON, DICKINSON AND COMPANY
    Inventors: Gary Searle, Andrew Burke, Peter Costello, Kenneth Focht, Francis L. Ross
  • Publication number: 20190167919
    Abstract: A flow sensor is provided to enable volumetric dose data to be acquired automatically by sampling flow rates of insulin measured by a flow sensor exposed to a flow manifold though which the insulin flows. The flow sensor preferably connects to a standard insulin pen on one end, and to a standard pen needle on the other end. Particular geometries and algorithms are utilized to accommodate the unique requirements of insulin flow determination during an injection event.
    Type: Application
    Filed: July 31, 2018
    Publication date: June 6, 2019
    Inventors: Gary Searle, Andrew Burke, Peter Costello, Kenneth Focht, Francis L. Ross
  • Publication number: 20180298197
    Abstract: A method of treating particulate titanium dioxide includes providing the particulate titanium dioxide which includes a crystal structure and then treating the particulate titanium dioxide with a coating agent that is an alkylphosphonic acid or an ester thereof, and steam micronizing the particulate titanium dioxide with a steam micronizer so that a vapor exit temperature from the steam micronizer is 150° C. or higher, so as to obtain a micronized particulate titanium dioxide which includes the coating agent at an outer surface. The particulate titanium dioxide includes an aluminum oxide coating and/or includes within the crystal structure aluminum oxide in a molar excess of an amount required to compensate any Nb2O5 in the crystal structure. The alkylphosphonic acid includes a C6-C22 alkyl group.
    Type: Application
    Filed: September 23, 2016
    Publication date: October 18, 2018
    Applicant: HUNTSMAN P&A UK LIMITED
    Inventors: ANTHONY G. JONES, DAVID WILLIAMSON, PETER COSTELLO, JOHN L. EDWARDS
  • Patent number: 10052441
    Abstract: A flow sensor is provided to enable volumetric dose data to be acquired automatically by sampling flow rates of insulin measured by a flow sensor exposed to a flow manifold though which the insulin flows. The flow sensor preferably connects to a standard insulin pen on one end, and to a standard pen needle on the other end. Particular geometries and algorithms are utilized to accommodate the unique requirements of insulin flow determination during an injection event.
    Type: Grant
    Filed: August 2, 2016
    Date of Patent: August 21, 2018
    Assignee: Becton, Dickinson and Company
    Inventors: Gary Searle, Andrew Burke, Peter Costello, Kenneth Focht, Francis L. Ross
  • Publication number: 20180036495
    Abstract: A flow sensor is provided to enable volumetric dose data to be acquired automatically by sampling flow rates of insulin measured by a flow sensor exposed to a flow manifold though which the insulin flows. The flow sensor preferably connects to a standard insulin pen on one end, and to a standard pen needle on the other end. Particular geometries and algorithms are utilized to accommodate the unique requirements of insulin flow determination during an injection event.
    Type: Application
    Filed: August 2, 2016
    Publication date: February 8, 2018
    Inventors: Gary Searle, Andrew Burke, Peter Costello, Kenneth Focht, Francis L. Ross
  • Patent number: 7545158
    Abstract: A method for testing System-In-Package (SIP) devices each having a plurality of electrical contacts is described. The method and apparatus utilizes industry standard JEDEC trays and tests at least a predetermined portion of all devices in such trays at the same time.
    Type: Grant
    Filed: April 12, 2007
    Date of Patent: June 9, 2009
    Assignee: Chroma ATE Inc.
    Inventors: James E. Hopkins, Michael Peter Costello, Herbert Tsai, Ching-Too Chen
  • Patent number: 7535214
    Abstract: Apparatus for testing System-In-Package (SIP) devices each having a plurality of electrical leads is described. The apparatus utilizes industry standard JEDEC trays and tests at least a predetermined portion of all devices in such trays at the same time. The apparatus comprises a test hive comprising: a plurality of test circuits corresponding in number to at least a predetermined number of cells in the tray; and a plurality of groups of test contacts, each group is coupled to one of the test circuits and is oriented to engage the plurality of electrical contacts of a SIP device disposed in a corresponding one of the cells. The test hive is operable to simultaneously, electrically test at least a predetermined number of the number of the SIP devices in each tray engaged by the hive without removing the SIP devices from the tray.
    Type: Grant
    Filed: April 12, 2007
    Date of Patent: May 19, 2009
    Assignee: Chroma Ate Inc
    Inventors: James E. Hopkins, Michael Peter Costello, Herbert Tsai, Ching-Too Chen
  • Patent number: 7518357
    Abstract: Apparatus for testing micro SD devices each having a plurality of electrical leads is described. The apparatus utilizes industry standard JEDEC trays and tests all devices in such trays at the same time. The apparatus comprises a test hive comprising: a plurality of test circuits corresponding in number to at least a predetermined number of cells in the tray; and a plurality of groups of test contacts, each group is coupled to one of the test circuits and is oriented to engage the plurality of electrical contacts of a micro SD device disposed in a corresponding one of the cells. The test hive is operable to simultaneously, electrically test at least a predetermined number of the number of the micro SD devices in each tray engaged by the hive without removing the micro SD devices that did pass electrical testing until a tray of electrically tested micro SD devices is fully populated with micro SD devices that did pass electrical testing.
    Type: Grant
    Filed: April 12, 2007
    Date of Patent: April 14, 2009
    Assignee: Chroma Ate Inc.
    Inventors: James E. Hopkins, Michael Peter Costello, Herbert Tsai, Ching-Too Chen
  • Patent number: 7518356
    Abstract: Apparatus for testing System-In-Package (SIP) devices each having a plurality of electrical contacts is described. The apparatus comprises a JEDEC standard tray receiving apparatus comprising a plurality of tray aligners to align the tray into a predetermined position to account for dimensional tolerances of the tray. The apparatus further comprises a test assembly proximate the tray receiving apparatus. The assembly comprises; a plurality of test circuits corresponding in number to the number of cells in the tray, a plurality of groups of test contacts, each of group of the test contacts being coupled to one of the test circuits and being oriented to engage a plurality of electrical contacts of a SIP device disposed in a corresponding one of the cell, the plurality of test circuits being operable to simultaneously, electrically test a predetermined number of SIP devices in a JEDEC standard tray engaged by the receiving apparatus without removing the SIP devices from the tray.
    Type: Grant
    Filed: April 12, 2007
    Date of Patent: April 14, 2009
    Assignee: Chroma Ate Inc.
    Inventors: James E. Hopkins, Michael Peter Costello, Herbert Tsai, Ching-Too Chen
  • Patent number: 7514914
    Abstract: Apparatus for testing System-In-Package (SIP) devices each having a plurality of electrical leads is described. The apparatus utilizes industry standard JEDEC trays and tests all devices in such trays at the same time. The apparatus of the illustrative embodiment comprises a test hive comprising: a plurality of test circuits corresponding in number to the number of cells in the tray; and a plurality of groups of test contacts, each of the groups of the test contacts being coupled to one of the test circuits and being oriented to engage the plurality of electrical contacts of SIP device disposed in a corresponding one of the cells, the test hive being operable to simultaneously, electrically test all of the SIP devices in each tray engaged by the hive without removing the SIP devices from the tray.
    Type: Grant
    Filed: April 12, 2007
    Date of Patent: April 7, 2009
    Assignee: Chroma Ate Inc
    Inventors: James E. Hopkins, Michael Peter Costello, Herbert Tsai, Ching-Too Chen
  • Patent number: 7489156
    Abstract: A method and apparatus for testing micro SD devices each having a plurality of electrical leads is described. The method and apparatus utilizes industry standard JEDEC trays and tests all devices in such trays at the same time.
    Type: Grant
    Filed: April 12, 2007
    Date of Patent: February 10, 2009
    Assignee: Chruma Ate Inc.
    Inventors: James E. Hopkins, Michael Peter Costello, Herbert Tsai, Ching-Too Chen
  • Patent number: 7489155
    Abstract: A method for testing System-In-Package (SIP) devices such as micro SD devices each having a plurality of electrical leads is described. The method utilizes industry standard JEDEC trays and tests all devices in such trays at the same time.
    Type: Grant
    Filed: April 12, 2007
    Date of Patent: February 10, 2009
    Assignee: Chroma Ate Inc
    Inventors: James E. Hopkins, Michael Peter Costello, Herbert Tsai, Ching-Too Chen
  • Patent number: 7443190
    Abstract: A method for testing micro SD devices each having a plurality of electrical leads is described. The method utilizes industry standard JEDEC trays and tests at least a predetermined portion of the devices in such trays at the same time.
    Type: Grant
    Filed: April 12, 2007
    Date of Patent: October 28, 2008
    Assignee: Chroma Ate Inc
    Inventors: James E. Hopkins, Michael Peter Costello, Herbert Tsai, Ching-Too Chen
  • Publication number: 20080252321
    Abstract: Apparatus for testing micro SD devices each having a plurality of electrical leads is described. The and apparatus utilizes industry standard JEDEC trays and tests all devices in such trays at the same time.
    Type: Application
    Filed: April 12, 2007
    Publication date: October 16, 2008
    Applicant: Semiconductor Testing Advanced Research Lab Inc.
    Inventors: James E. Hopkins, Michael Peter Costello, Herbert Tsai, Ching-Too Chen
  • Publication number: 20080252314
    Abstract: Apparatus for testing System-In-Package (SIP) devices each having a plurality of electrical leads is described. The apparatus utilizes industry standard JEDEC trays and tests at least a predetermined portion of all devices in such trays at the same time. The apparatus comprises a test hive comprising: a plurality of test circuits corresponding in number to at least a predetermined number of cells in the tray: and a plurality of groups of test contacts, each group is coupled to one of the test circuits and is oriented to engage the plurality of electrical contacts of a SIP device disposed in a corresponding one of the cells. The lest hive is operable to simultaneously, electrically test at least a predetermined number of the number of the SIP devices in each tray engaged by the hive without removing the SIP devices from the tray.
    Type: Application
    Filed: April 12, 2007
    Publication date: October 16, 2008
    Applicant: Semiconductor Testing Advanced Research Lab Inc.
    Inventors: James E. Hopkins, Michael Peter Costello, Herbert Tsai, Ching-Too Chen
  • Publication number: 20080252312
    Abstract: Apparatus for testing System-In-Package (SIP) devices each having a plurality of electrical leads is described. The apparatus utilizes industry standard JEDEC trays and tests all devices in such trays at the same time. The apparatus of the illustrative embodiment comprises a test hive comprising: a plurality of test circuits corresponding in number to the number of cells in the tray; and a plurality of groups of test contacts, each of the groups of the test contacts being coupled to one of the test circuits and being oriented to engage the plurality of electrical contacts of a SIP device disposed in a corresponding one of the cells, the test hive being operable to simultaneously, electrically test all of the SIP devices in each tray engaged by the hive without removing the SIP devices from the tray.
    Type: Application
    Filed: April 12, 2007
    Publication date: October 16, 2008
    Applicant: Semiconductor Testing Advanced Research Lab Inc.
    Inventors: James E. Hopkins, Michael Peter Costello, Herbert Tsai, Ching-Too Chen
  • Publication number: 20080252322
    Abstract: A method for testing System-In-Package (SIP) devices such as micro SD devices each having a plurality of electrical leads is described. The method utilizes industry standard JEDEC trays and tests all devices in such trays at the same time.
    Type: Application
    Filed: April 12, 2007
    Publication date: October 16, 2008
    Applicant: Semiconductor Testing Advanced Research Lab Inc.
    Inventors: James E. Hopkins, Michael Peter Costello, Herbert Tsai, Ching-Too Chen
  • Publication number: 20080252320
    Abstract: Apparatus for testing micro SD devices each having a plurality of electrical leads is described. The apparatus utilizes industry standard JEDEC trays and tests all devices in such trays at the same time. The apparatus comprises a test hive comprising: a plurality of test circuits corresponding in number to at least a predetermined number of cells in the tray: and a plurality of groups of test contacts, each group is coupled to one of the test circuits and is oriented to engage the plurality of electrical contacts of a micro SD device disposed in a corresponding one of the cells. The test hive is operable to simultaneously, electrically test at least a predetermined number of the number of the micro SD devices in each tray engaged by the hive without removing the micro SD devices that did pass electrical testing until a tray of electrically tested micro SD devices is fully populated with micro SD devices that did pass electrical testing.
    Type: Application
    Filed: April 12, 2007
    Publication date: October 16, 2008
    Applicant: Semiconductor Testing Advanced Research Lab Inc.
    Inventors: James E. Hopkins, Michael Peter Costello, Herbert Tsai, Ching-Too Chen
  • Patent number: D972720
    Type: Grant
    Filed: February 4, 2021
    Date of Patent: December 13, 2022
    Assignee: ANGIODYNAMICS, INC.
    Inventors: Seth Cote, James Mitchell, David Chesley, Christopher Harris, Peter Costello, Ayan Bhandair, Zachary Konsin, Kenneth Focht