Patents by Inventor Peter D. Keller

Peter D. Keller has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8775849
    Abstract: Systems and methods for synchronizing a clock at a customer premises equipment (CPE) location with a master clock at a central office (CO) location are described. One embodiment is a method that comprises receiving, by a time-of-day transmission convergence (ToD-TC) module in the CPE, ToD information relating to the master clock. Based on the received information, time stamps are applied to reference data samples. The method further comprises transporting the ToD information by transporting the reference data samples with applied time stamps and utilizing time stamps of the reference data samples to synchronize the CPE clock with the master clock.
    Type: Grant
    Filed: May 8, 2011
    Date of Patent: July 8, 2014
    Assignee: Ikanos Communications, Inc.
    Inventors: Massimo Sorbara, Sigurd Schelstraete, Robert A. Day, Peter D. Keller
  • Publication number: 20110296226
    Abstract: Systems and methods for synchronizing a clock at a customer premises equipment (CPE) location with a master clock at a central office (CO) location are described. One embodiment is a method that comprises receiving, by a time-of-day transmission convergence (ToD-TC) module in the CPE, ToD information relating to the master clock. Based on the received information, time stamps are applied to reference data samples. The method further comprises transporting the ToD information by transporting the reference data samples with applied time stamps and utilizing time stamps of the reference data samples to synchronize the CPE clock with the master clock.
    Type: Application
    Filed: May 8, 2011
    Publication date: December 1, 2011
    Applicant: IKANOS COMMUNICATIONS, INC.
    Inventors: Massimo Sorbara, Sigurd Schelstraete, Robert A. Day, Peter D. Keller
  • Patent number: 6281829
    Abstract: In general, the multi-mode analog front-end provides an internal line driver and hybrid, as well as numerous functions, in order to provide a close to optimum solution for all digital subscriber line applications. The functions provided for by the analog front-end include; programmable hybrid attenuation; onboard amplifiers for driving external transmit and receive filters; a line driver with programmable drive and gain; programmable RC-filters capable of calibration via an internal loop-back under digital control; a programmable switched-capacitor filter for tracking the over sampling rate used by a digital signal processor; internal testing functions; a high frequency boost circuit; a dual input peak detector; selectable data rates; and a programmable data interface. The analog front-end allows for use of particular blocks within the analog front-end particular to the functions necessary to compensate for a particular digital subscriber line application.
    Type: Grant
    Filed: August 27, 1999
    Date of Patent: August 28, 2001
    Assignee: Globespan, Inc.
    Inventors: Daniel Amrany, Arnold Muralt, Frode Larsen, Sam Olu George, Nianxiong Tan, Min Shen, Peter D. Keller, Jung-Lung Lin
  • Patent number: 6233594
    Abstract: The disclosure is generally directed to an improved structure for a decimation filter. More specifically, the disclosure includes a method and apparatus for decimating an oversampled signal at the input, which is the output of an oversampling analog-to-digital converter. In accordance with one aspect of the system, an apparatus is provided for decimating an oversampled signal. The apparatus includes at least one non-recursive decimator. Specifically, the at least one non-recursive decimator is configured to receive the oversampled input signal defined by a first sampling frequency. This at least one non-recursive decimator is further configured to generate a output having a second sampling frequency. The apparatus further includes a recursive decimator. The recursive decimator is configured to receive the output of the at least one non-recursive decimator and generate an output having third sampling frequency.
    Type: Grant
    Filed: October 20, 1998
    Date of Patent: May 15, 2001
    Assignee: Globespan, Inc.
    Inventors: Nianxiong Tan, Peter D. Keller