Patents by Inventor Peter Darnell
Peter Darnell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11334327Abstract: A graphical block diagram can use an execution order block to enforce an execution order for parallel subtrees. A graphical data flow block diagram is generated that includes parallel subtrees. The parallel subtrees can be connected to input pins of the execution order block in the execution order. The parallel subtrees are processed in the execution order before other blocks connected to the parallel subtrees are processed according to the normal execution order of the graphical program. The execution order of the execution order block is not affected by the other blocks, and the normal execution order of the other blocks according to the graphical program is not affected by the execution order of the execution order block. The techniques described herein improve a model-based development platform.Type: GrantFiled: January 19, 2021Date of Patent: May 17, 2022Assignee: Altair Engineering, Inc.Inventor: Peter Darnell
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Patent number: 11175895Abstract: A graphical block diagram can be used to execute multiple operating modes, such as a code generation or simulation mode. The graphical block diagram may include at least a first graphical block used solely in a first operating mode and a second graphical block used solely in a second operating mode. Each of the first and second graphical blocks includes a respective input receiving an input from a defined mode block. The defined mode block produces a mode output indicating a selection of one of the multiple operating modes. Other blocks of the graphical block diagram may be used in more than one operating mode. Depending on the value of the mode output, the graphical block diagram is interpreted according to the first or second operating mode. More than two operating modes are possible. The techniques described herein improve a model-based development platform.Type: GrantFiled: October 19, 2020Date of Patent: November 16, 2021Assignee: Altair Engineering, Inc.Inventors: Peter Darnell, Richard A. Kolk
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Publication number: 20210182032Abstract: A graphical block diagram can use an execution order block to enforce an execution order for parallel subtrees. A graphical data flow block diagram is generated that includes parallel subtrees. The parallel subtrees can be connected to input pins of the execution order block in the execution order. The parallel subtrees are processed in the execution order before other blocks connected to the parallel subtrees are processed according to the normal execution order of the graphical program. The execution order of the execution order block is not affected by the other blocks, and the normal execution order of the other blocks according to the graphical program is not affected by the execution order of the execution order block. The techniques described herein improve a model-based development platform.Type: ApplicationFiled: January 19, 2021Publication date: June 17, 2021Inventor: Peter Darnell
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Publication number: 20210089279Abstract: A graphical block diagram can be used to execute multiple operating modes, such as a code generation or simulation mode. The graphical block diagram may include at least a first graphical block used solely in a first operating mode and a second graphical block used solely in a second operating mode. Each of the first and second graphical blocks includes a respective input receiving an input from a defined mode block. The defined mode block produces a mode output indicating a selection of one of the multiple operating modes. Other blocks of the graphical block diagram may be used in more than one operating mode. Depending on the value of the mode output, the graphical block diagram is interpreted according to the first or second operating mode. More than two operating modes are possible. The techniques described herein improve a model-based development platform.Type: ApplicationFiled: October 19, 2020Publication date: March 25, 2021Inventors: Peter Darnell, Richard A. Kolk
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Patent number: 10901703Abstract: A graphical block diagram can use an execution order block to enforce an execution order for parallel subtrees. A graphical data flow block diagram is generated that includes parallel subtrees. The parallel subtrees can be connected to input pins of the execution order block in the execution order. The parallel subtrees are processed in the execution order before other blocks connected to the parallel subtrees are processed according to the normal execution order of the graphical program. The execution order of the execution order block is not affected by the other blocks, and the normal execution order of the other blocks according to the graphical program is not affected by the execution order of the execution order block. The techniques described herein improve a model-based development platform.Type: GrantFiled: October 3, 2019Date of Patent: January 26, 2021Assignee: Altair Engineering, Inc.Inventor: Peter Darnell
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Patent number: 10809981Abstract: A graphical block diagram can be used to execute multiple operating modes, such as a code generation or simulation mode. The graphical block diagram may include at least a first graphical block used solely in a first operating mode and a second graphical block used solely in a second operating mode. Each of the first and second graphical blocks includes a respective input receiving an input from a defined mode block. The defined mode block produces a mode output indicating a selection of one of the multiple operating modes. Other blocks of the graphical block diagram may be used in more than one operating mode. Depending on the value of the mode output, the graphical block diagram is interpreted according to the first or second operating mode. More than two operating modes are possible. The techniques described herein improve a model-based development platform.Type: GrantFiled: June 7, 2019Date of Patent: October 20, 2020Assignee: Altair Engineering, Inc.Inventors: Peter Darnell, Richard A. Kolk
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Publication number: 20200034121Abstract: A graphical block diagram can use an execution order block to enforce an execution order for parallel subtrees. A graphical data flow block diagram is generated that includes parallel subtrees. The parallel subtrees can be connected to input pins of the execution order block in the execution order. The parallel subtrees are processed in the execution order before other blocks connected to the parallel subtrees are processed according to the normal execution order of the graphical program. The execution order of the execution order block is not affected by the other blocks, and the normal execution order of the other blocks according to the graphical program is not affected by the execution order of the execution order block. The techniques described herein improve a model-based development platform.Type: ApplicationFiled: October 3, 2019Publication date: January 30, 2020Inventor: Peter Darnell
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Patent number: 10445072Abstract: A graphical block diagram can use an execution order block to enforce an execution order for parallel subtrees. A graphical data flow block diagram is generated that includes parallel subtrees. The parallel subtrees can be connected to input pins of the execution order block in the execution order. The parallel subtrees are processed in the execution order before other blocks connected to the parallel subtrees are processed according to the normal execution order of the graphical program. The execution order of the execution order block is not affected by the other blocks, and the normal execution order of the other blocks according to the graphical program is not affected by the execution order of the execution order block. The techniques described herein improve a model-based development platform.Type: GrantFiled: January 10, 2017Date of Patent: October 15, 2019Assignee: Altair Engineering, Inc.Inventor: Peter Darnell
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Publication number: 20190294420Abstract: A graphical block diagram can be used to execute multiple operating modes, such as a code generation or simulation mode. The graphical block diagram may include at least a first graphical block used solely in a first operating mode and a second graphical block used solely in a second operating mode. Each of the first and second graphical blocks includes a respective input receiving an input from a defined mode block. The defined mode block produces a mode output indicating a selection of one of the multiple operating modes. Other blocks of the graphical block diagram may be used in more than one operating mode. Depending on the value of the mode output, the graphical block diagram is interpreted according to the first or second operating mode. More than two operating modes are possible. The techniques described herein improve a model-based development platform.Type: ApplicationFiled: June 7, 2019Publication date: September 26, 2019Inventors: Peter Darnell, Richard A. Kolk
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Patent number: 10318251Abstract: A graphical block diagram can be used to execute multiple operating modes, such as a code generation or simulation mode. The graphical block diagram may include at least a first graphical block used solely in a first operating mode and a second graphical block used solely in a second operating mode. Each of the first and second graphical blocks includes a respective input receiving an input from a defined mode block. The defined mode block produces a mode output indicating a selection of one of the multiple operating modes. Other blocks of the graphical block diagram may be used in more than one operating mode. Depending on the value of the mode output, the graphical block diagram is interpreted according to the first or second operating mode. More than two operating modes are possible. The techniques described herein improve a model-based development platform.Type: GrantFiled: January 6, 2017Date of Patent: June 11, 2019Assignee: Altair Engineering, Inc.Inventors: Peter Darnell, Richard A. Kolk
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Patent number: 4829422Abstract: Multiple processors are enabled to regulate their work within sections of a machine instruction sequence by storing status information about the state of execution of the parallel regions by the processors, and including, in the machine instruction sequence, parallel control instructions which enable each processor to proceed from section to section on the basis of the status information, without interrupting the execution of the machine instruction sequence.Type: GrantFiled: April 2, 1987Date of Patent: May 9, 1989Assignee: STellar Computer, Inc.Inventors: Milton A. Morton, Peter A. Darnell, Lee W. Cooprider, Gary Bray