Patents by Inventor Peter Dowben
Peter Dowben has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11764786Abstract: A magneto-electric (ME) majority gate device includes a conducting device and a plurality of ME transistors coupled to the conducting device. In one implementation, the plurality of ME transistors include a ME AND gate device with downward interface polarization, a ME-transmission gate device with downward interface polarization, and a ME-XNOR gate device. In another implementation, the plurality of ME transistors is five single-input ME-FETs.Type: GrantFiled: May 29, 2022Date of Patent: September 19, 2023Assignees: BOARD OF REGENTS OF THE UNIVERSITY OF NEBRASKA, BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM, INTEL CORPORATIONInventors: Nishtha Sharma Gaul, Andrew Marshall, Peter A. Dowben, Dmitri E. Nikonov
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Patent number: 11757449Abstract: A magneto-electric (ME) XNOR logic gate device includes a conducting device; and a ME-FET coupled to the conducting device. The ME-FET can be formed of a split gate; a first gate terminal coupled to a first portion of the split gate for receiving a first input signal; a second gate terminal coupled to a second portion of the split gate for receiving a second input signal; a source terminal coupled to a ground line; and a drain terminal coupled to the conducting device.Type: GrantFiled: May 29, 2022Date of Patent: September 12, 2023Assignees: BOARD OF REGENT'S OF THE UNIVERSITY OF NEBRASKA, BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM, INTEL CORPORATIONInventors: Nishtha Sharma Gaul, Andrew Marshall, Peter A. Dowben, Dmitri E. Nikonov
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Patent number: 11658663Abstract: A magneto-electric (ME) inverter includes two anti-ferromagnetic spin orbit read (AFSOR) circuit elements, each AFSOR circuit element has a CMOS inverter; and an AFSOR device with a ME base layer; a semiconductor channel layer on the ME base layer and comprising a source terminal and a drain terminal, where the source terminal is coupled to an output of the CMOS inverter; and a gate electrode on the semiconductor channel layer. The gate electrode of a second AFSOR device of the two AFSOR circuit elements is coupled to the drain terminal of a first AFSOR device of the two AFSOR circuit elements.Type: GrantFiled: May 29, 2022Date of Patent: May 23, 2023Assignees: BOARD OF REGENTS OF THE UNIVERSITY OF NEBRASKA, INTEL CORPORATION, Board OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEMInventors: Nishtha Sharma Gaul, Andrew Marshall, Peter A. Dowben, Dmitri E. Nikonov
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Publication number: 20220294450Abstract: A magneto-electric (ME) inverter includes two anti-ferromagnetic spin orbit read (AFSOR) circuit elements, each AFSOR circuit element has a CMOS inverter; and an AFSOR device with a ME base layer; a semiconductor channel layer on the ME base layer and comprising a source terminal and a drain terminal, where the source terminal is coupled to an output of the CMOS inverter; and a gate electrode on the semiconductor channel layer. The gate electrode of a second AFSOR device of the two AFSOR circuit elements is coupled to the drain terminal of a first AFSOR device of the two AFSOR circuit elements.Type: ApplicationFiled: May 29, 2022Publication date: September 15, 2022Applicants: Board of Regents of the University of Nebraska, BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM, Intel CorporationInventors: Nishtha Sharma GAUL, Andrew MARSHALL, Peter A. DOWBEN, Dmitri E. NIKONOV
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Publication number: 20220294448Abstract: A magneto-electric (ME) XNOR logic gate device includes a conducting device; and a ME-FET coupled to the conducting device. The ME-FET can be formed of a split gate; a first gate terminal coupled to a first portion of the split gate for receiving a first input signal; a second gate terminal coupled to a second portion of the split gate for receiving a second input signal; a source terminal coupled to a ground line; and a drain terminal coupled to the conducting device.Type: ApplicationFiled: May 29, 2022Publication date: September 15, 2022Applicants: Board of Regents of the University of Nebraska, BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM, Intel CorporationInventors: Nishtha Sharma GAUL, Andrew MARSHALL, Peter A. DOWBEN, Dmitri E. NIKONOV
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Publication number: 20220294449Abstract: A magneto-electric (ME) majority gate device includes a conducting device and a plurality of ME transistors coupled to the conducting device. In one implementation, the plurality of ME transistors include a ME AND gate device with downward interface polarization, a ME-transmission gate device with downward interface polarization, and a ME-XNOR gate device. In another implementation, the plurality of ME transistors is five single-input ME-FETs.Type: ApplicationFiled: May 29, 2022Publication date: September 15, 2022Applicants: Board of Regents of the University of Nebraska, BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM, Intel CorporationInventors: Nishtha Sharma GAUL, Andrew MARSHALL, Peter A. DOWBEN, Dmitri E. NIKONOV
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Publication number: 20220238537Abstract: A thin film molecular memory is provided that satisfies criteria needed to make a molecular spintronic device, based on spin crossover complexes, competitive with silicon technology. These criteria include, device implementation, a low coercive voltage (less than 1V) and low write peak currents (on the order of 104 A/cm2), a device on/off ratio >10, thin film quality, the ability to “lock” the spin state (providing nonvolatility), the ability to isothermally “unlock” and switch the spin state with voltage, conductance change with spin state, room temperature and above room temperature operation, an on-state device resistivity less than 1 ?·cm, a device fast switching speed (less than 100 ps), device endurance (on the order of 1016 switches without degradation), and the ability of having a device with a transistor channel width of 10 nm or below.Type: ApplicationFiled: January 25, 2022Publication date: July 28, 2022Inventors: Peter A. Dowben, Ruihua Cheng, Xiaoshan Xu, Alpha T. N'Diaye, Aaron Mosey, Guanhua Hao, Thilini K. Ekanayaka, Xuanyuan Jiang, Andrew J. Yost, Andrew Marshall, Azad J. Naeemi
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Patent number: 11349480Abstract: Logic circuits constructed with magnetoelectric (ME) transistors are described herein. A ME logic gate device can include at least one conducting device, for example, at least one MOS transistor; and at least one ME transistor coupled to the at least one conducting device. The ME transistor can be a ME field effect transistor (ME-FET), which can be can be an anti-ferromagnetic spin-orbit read (AFSOR) device or a non-AFSOR device. The gates and logic circuits described herein can be included as standard cells in a design library. Cells of the cell library can include standard cells for a ME inverter device, a ME minority gate device, a ME majority gate device, a ME full adder, a ME XNOR device, a ME XOR device, or a combination thereof.Type: GrantFiled: September 24, 2019Date of Patent: May 31, 2022Assignees: BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM, BOARD OF REGENTS OF THE UNIVERSITY OF NEBRASKA, INTEL CORPORATIONInventors: Nishtha Sharma Gaul, Andrew Marshall, Peter A. Dowben, Dmitri E. Nikonov
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Publication number: 20200099379Abstract: Logic circuits constructed with magnetoelectric (ME) transistors are described herein. A ME logic gate device can include at least one conducting device, for example, at least one MOS transistor; and at least one ME transistor coupled to the at least one conducting device. The ME transistor can be a ME field effect transistor (ME-FET), which can be can be an anti-ferromagnetic spin-orbit read (AFSOR) device or a non-AFSOR device. The gates and logic circuits described herein can be included as standard cells in a design library. Cells of the cell library can include standard cells for a ME inverter device, a ME minority gate device, a ME majority gate device, a ME full adder, a ME XNOR device, a ME XOR device, or a combination thereof.Type: ApplicationFiled: September 24, 2019Publication date: March 26, 2020Applicants: Board of Regents of the University of Nebraska, BOARD OF REGENTS, THE UNIVERSITY OF TEXAS SYSTEM, Intel CorporationInventors: Nishtha SHARMA, Andrew MARSHALL, Peter A. DOWBEN, Dmitri E. NIKONOV
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Patent number: 10361292Abstract: Antiferromagnetic magneto-electric spin-orbit read (AFSOR) logic devices are presented. The devices include a voltage-controlled magnetoelectric (ME) layer that switches polarization in response to an electric field from the applied voltage and a narrow channel conductor of a spin-orbit coupling (SOC) material on the ME layer. One or more sources and one or more drains, each optionally formed of ferromagnetic material, are provided on the SOC material.Type: GrantFiled: February 17, 2018Date of Patent: July 23, 2019Assignees: INTEL CORPORATION, THE RESEARCH FOUNDATION FOR THE STATE UNIVERSITY OF NEW YORK, BOARD OF REGENTS OF THE UNIVERSITY OF NEBRASKA, THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Dmitri E. Nikonov, Christian Binek, Xia Hong, Jonathan P. Bird, Kang L. Wang, Peter A. Dowben
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Patent number: 10177303Abstract: A magneto-electric magnetic tunnel junction device (ME-MTJ) that permits direct driving of ME-MTJ devices by a prior ME-MTJ device is the unipolar magneto-electric magnetic tunnel junction (UMMTJ) device. The UMMTJ device enables full logic circuitry to be implemented without level shifting between each logic element.Type: GrantFiled: January 23, 2018Date of Patent: January 8, 2019Assignee: Board of Regents, The University of Texas SystemInventors: Nishtha Sharma, Peter Dowben, Andrew Marshall
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Publication number: 20180240896Abstract: Antiferromagnetic magneto-electric spin-orbit read (AFSOR) logic devices are presented. The devices include a voltage-controlled magnetoelectric (ME) layer that switches polarization in response to an electric field from the applied voltage and a narrow channel conductor of a spin-orbit coupling (SOC) material on the ME layer. One or more sources and one or more drains, each optionally formed of ferromagnetic material, are provided on the SOC material.Type: ApplicationFiled: February 17, 2018Publication date: August 23, 2018Applicants: Board of Regents of the University of Nebraska, Intel Corporation, The Research Foundation for the State University of New York STOR - University at Buffalo, The Regents of the University of CaliforniaInventors: Dmitri E. NIKONOV, Christian BINEK, XIA HONG, Jonathan P. BIRD, Kang L. WANG, Peter A. DOWBEN
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Publication number: 20180212141Abstract: A magneto-electric magnetic tunnel junction device (ME-MTJ) that permits direct driving of ME-MTJ devices by a prior ME-MTJ device is the unipolar magneto-electric magnetic tunnel junction (UMMTJ) device. The UMMTJ device enables full logic circuitry to be implemented without level shifting between each logic element.Type: ApplicationFiled: January 23, 2018Publication date: July 26, 2018Applicants: Board of Regents, The University of Texas System, NUtech VenturesInventors: Nishtha Sharma, Peter Dowben, Andrew Marshall
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Patent number: 9799815Abstract: A thermoelectric converter is provided where an n-type boron carbide element is paired with a p-type boron carbide element and placed between a eat sink and a high temperature are, such as the ocean in which a submarine operates, and the interior of that submarine, respectively. Boron carbide elements suitable for use in this invention are deposited from meta carborane (n-type) together with dopants to emphasize n-type character, such as chromocene, and orthocarborane, together with dopants to emphasize p-type character, such as 1,4 diaminobenzene to form the p-type element.Type: GrantFiled: September 6, 2012Date of Patent: October 24, 2017Assignee: QUANTUM DEVICES, LLCInventor: Peter Dowben
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Patent number: 9718700Abstract: A magnetoelectric composition of boron and chromia is provided. The boron and chromia alloy can contain boron doping of 1%-10% in place of the oxygen in the chromia. The boron-doped chromia exhibits an increased critical temperature while maintaining magnetoelectric characteristics. The composition can be fabricated by depositing chromia in the presence of borane. The boron substitutes oxygen in the chromia, enhancing the exchange energy and thereby increasing Néel temperature.Type: GrantFiled: February 23, 2015Date of Patent: August 1, 2017Assignee: Board of Regents of the University of NebraskaInventors: Christian Binek, Peter Dowben, Kirill Belashchenko, Aleksander Wysocki, Sai Mu, Mike Street
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Patent number: 9620654Abstract: A voltage switchable coherent spin field effect transistor is provided by depositing a ferromagnetic base like cobalt on a substrate. A chrome oxide layer is formed on the cobalt by MBE at room at UHV at room temperature. There was thin cobalt oxide interface between the chrome oxide and the cobalt. Other magnetic materials may be employed. A few ML field of graphene is deposited on the chrome oxide by molecular beam epitaxy, and a source and drain are deposited of base material. The resulting device is scalable, provides high on/off rates, is stable and operable at room temperature and easily fabricated with existing technology.Type: GrantFiled: April 3, 2015Date of Patent: April 11, 2017Assignee: QUANTUM DEVICES, LLCInventors: Jeffry Kelber, Peter Dowben
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Patent number: 9614149Abstract: A coherent spin field effect transistor is provided by depositing a ferromagnetic base like cobalt on a substrate. A magnetic oxide layer is formed on the cobalt by annealing at temperatures on the order of 1000° K to provide a few monolayer thick layer. Where the gate is cobalt, the resulting magnetic oxide is Co3O4 (111). Other magnetic materials and oxides may be employed. A few ML field of graphene is deposited on the cobalt (III) oxide by molecular beam epitaxy, and a source and drain are deposited of base material. The resulting device is scalable, provides high on/off rates, is stable and operable at room temperature and easily fabricated with existing technology.Type: GrantFiled: February 25, 2014Date of Patent: April 4, 2017Assignee: Quantum Devices, LLCInventors: Jeffry A. Kelber, Peter Dowben
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Patent number: 9349958Abstract: The invention relates to the use of zwitterionic molecules for forming a hole or electron transport layer. The preferred zwitterionic molecules of the invention are derivatives of p-benzoquinonemonoimines. The invention is useful in the field of electronic devices in particular.Type: GrantFiled: August 23, 2011Date of Patent: May 24, 2016Assignees: CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE, UNIVERSITE DE STRASBOURG, UNIVERSITY OF NEBRASKA LINCOLNInventors: Bernard Doudin, Pierre Braunstein, Lucie Routaboul, Guillaume Dalmas, Zhengzheng Zhang, Peter Dowben
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Patent number: 9324938Abstract: Boron carbide polymers prepared from orthocarborane icosahedra cross-linked with a moiety A wherein A is selected from the group consisting of benzene, pyridine. 1,4-diaminobenzene and mixtures thereof give positive magnetoresistance effects of 30%-80% at room temperature. The novel polymers may be doped with transitional metals to improve electronic and spin performance. These polymers may be deposited by any of a variety of techniques, and may be used in a wide variety of devices including magnetic tunnel junctions, spin-memristors and non-local spin valves.Type: GrantFiled: December 6, 2013Date of Patent: April 26, 2016Assignee: UNIVERSITY OF NORTH TEXASInventors: Jeffry Kelber, Peter Dowben
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Patent number: 9324960Abstract: Novel semiconducting polymers have been formed via the electron-induced cross-linking of orthocarborane B10C2H2 and 1,4-diaminobenzene. The films were formed by co-condensation of the molecular precursors and 200 eV electron-induced cross-linking under ultra-high vacuum (UHV) conditions. Ultraviolet photoemission spectra show that the compound films display a shift of the valence band maximum from ˜4.3 eV below the Fermi level for pure boron carbide to ?1.7 eV below the Fermi level when diaminobenzene is added. The surface photovoltage effect decreases with decreasing B/N atomic ratio. A neutron detector comprises the polymer as the p-type semiconductor to be paired with an n-type semiconductor.Type: GrantFiled: June 4, 2012Date of Patent: April 26, 2016Assignee: QUANTUM DEVICES, LLCInventors: Peter Dowben, Jeffry Kelber