Abstract: Cache memory input/output apparatus that allows transfer of a single data word and transfer of consecutive sequences of data words in a row of memory, using two independent serial ports and a random access port whose actions are controlled in part by a memory address signal. Data transferred by the serial ports are double buffered, each serial port having two independent registers; and the two registers associated with a serial port may be ganged together to transfer data sequences having word lengths from 16, or multiples thereof, up to arbitrary multiples of the length of a row of data words.

Abstract: A cache memory management unit that performs searches in a cache memory unit that supplements a disc memory that serves a digital computer. When the computer needs to write a chosen data block into, or read a chosen data block from, its disc memory, the unit first performs a search for the tag or identification label for the chosen data block in the cache memory unit, before the computer searches the disc memory. The unit also implements an algorithm that identifies the least recently used and most recently used cache data blocks.