Patents by Inventor Peter G. Logghe

Peter G. Logghe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5958017
    Abstract: A congestion control mechanism for a node of a modular computer network system. The mechanism includes registers for maintaining the number of undelivered requests and unanswered requests for the node and registers for the maximum number of such undelivered requests and unanswered requests. The mechanism regulates congestion on the network by throttling back or ratcheting up the allowed number of undelivered requests and unanswered requests based upon the level of busy and non-busy results of such requests and answers. Congestion is also alleviated by the implementation of a set of large and small send and receive buffers. These buffers are configurably partitioned among virtual I/O channels. Each request virtual I/O channel may utilitize congestion control.
    Type: Grant
    Filed: September 23, 1997
    Date of Patent: September 28, 1999
    Assignee: Cray Research, Inc.
    Inventors: Steven L. Scott, Richard D. Pribnow, Peter G. Logghe, Daniel L. Kunkel, Gerald A. Schwoerer
  • Patent number: 5748900
    Abstract: A congestion control mechanism for a node of a modular computer network system. The mechanism includes registers for maintaining the number of undelivered requests and unanswered requests for the node and registers for the maximum number of such undelivered requests and unanswered requests. The mechanism regulates congestion on the network by throttling back or ratcheting up the allowed number of undelivered requests and unanswered requests based upon the level of busy and non-busy results of such requests and answers. Congestion is also alleviated by the implementation of a set of large and small send and receive buffers. These buffers are configurably partitioned among virtual I/O channels. Each request virtual I/O channel may utilitize congestion control.
    Type: Grant
    Filed: March 13, 1996
    Date of Patent: May 5, 1998
    Assignee: Cray Research, Inc.
    Inventors: Steven L. Scott, Richard D. Pribnow, Peter G. Logghe, Daniel L. Kunkel, Gerald A. Schwoerer
  • Patent number: 5692123
    Abstract: A maintenance channel for modular computer system reset, configuration, partitioning, and error communication. The maintenance channel includes a sanity code channel to ensure module functionality. The maintenance channel configures the computer system and issues commands to modules using a command channel. Error detection and diagnostics are performed using an error channel. The maintenance channel provides independent processing groups within one computer system, and allows for partial powerdown or isolation of portions of the system without affecting operations in the active portions of the computer system.
    Type: Grant
    Filed: December 7, 1994
    Date of Patent: November 25, 1997
    Assignee: Cray Research, Inc.
    Inventor: Peter G. Logghe
  • Patent number: 5623698
    Abstract: A processor to memory interconnect network can be used to construct both small and large scale multiprocessing systems. The interconnect network includes network modules and memory modules. The network and memory modules are constructed of a series of n.times.m switches, each of which route n inputs to m outputs. The switches are designed such that message contention in the interconnect network is reduced. The switches, and thus the memory and network modules are highly modular, thus allowing virtually any scale multiprocessing system to be constructed utilizing the same components.
    Type: Grant
    Filed: April 30, 1993
    Date of Patent: April 22, 1997
    Assignee: Cray Research, Inc.
    Inventors: Bricky A. Stephenson, Peter G. Logghe