Patents by Inventor Peter Geiss
Peter Geiss has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10696284Abstract: A brake-pressure control device for a motor-vehicle braking system, with an electric motor, the rotatory motion of which is transformed by a ball screw drive into a translatory motion of a piston in a working cylinder, in order to be able to build up a defined braking pressure in a wheel brake independently of actuation of a master brake cylinder. An aspect provides that the ball screw drive is provided with a friction slip coupling engaged over a profiled tube which is fixedly connected to a nut of the ball screw drive and to which the piston is fixed.Type: GrantFiled: November 17, 2016Date of Patent: June 30, 2020Assignee: CONTINENTAL TEVES AG & CO. OHGInventors: Pierre Schmitt, Johannes Görlach, Theo Baukholt, Peter Geiß
-
Publication number: 20180345939Abstract: A brake-pressure control device for a motor-vehicle braking system, with an electric motor, the rotatory motion of which is transformed by a ball screw drive into a translatory motion of a piston in a working cylinder, in order to be able to build up a defined braking pressure in a wheel brake independently of actuation of a master brake cylinder. An aspect provides that the ball screw drive is provided with a friction slip coupling engaged over a profiled tube which is fixedly connected to a nut of the ball screw drive and to which the piston is fixed.Type: ApplicationFiled: November 17, 2016Publication date: December 6, 2018Inventors: Pierre Schmitt, Johannes Görlach, Theo Baukholt, Peter Geiß
-
Publication number: 20070284694Abstract: A method of modulating grain size in a polysilicon layer and devices fabricated with the method. The method includes forming the layer of polysilicon on a substrate; and performing an ion implantation of a polysilicon grain size modulating species into the polysilicon layer such that an average resultant grain size of the implanted polysilicon layer after performing a pre-determined anneal is higher or lower than an average resultant grain size than would be obtained after performing the same pre-determined anneal on the polysilicon layer without a polysilicon grain size modulating species ion implant.Type: ApplicationFiled: June 29, 2007Publication date: December 13, 2007Inventors: Peter Geiss, Joseph Greco, Richard Kontra, Emily Lanning
-
Publication number: 20070207567Abstract: Disclosed is a bipolar complementary metal oxide semiconductor (BiCMOS) or NPN/PNP device that has a collector, an intrinsic base above the collector, shallow trench isolation regions adjacent the collector, a raised extrinsic base above the intrinsic base, a T-shaped emitter above the extrinsic base, spacers adjacent the emitter, and a silicide layer that is separated from the emitter by the spacers.Type: ApplicationFiled: April 6, 2005Publication date: September 6, 2007Inventors: Peter Geiss, Alvin Joseph, Qizhi Liu, Bradley Orner
-
Publication number: 20060124964Abstract: A heterobipolar transistor (HBT) for high-speed BiCMOS applications is provided in which the collector resistance, Rc, is lowered by providing a buried refractory metal silicide layer underneath the shallow trench isolation region on the subcollector of the device. Specifically, the HBT of the present invention includes a substrate including at least a subcollector; a buried refractory metal silicide layer located on the subcollector; and a shallow trench isolation region located on a surface of the buried refractory metal silicide layer. The present invention also provides a method of fabricating such a HBT. The method includes forming a buried refractory metal silicide underneath the shallow trench isolation region on the subcollector of the device.Type: ApplicationFiled: November 29, 2005Publication date: June 15, 2006Applicant: International Business Machines CorporationInventors: Peter Geiss, Peter Gray, Alvin Joseph, Qizhi Liu
-
Publication number: 20060060887Abstract: A heterojunction bipolar transistor is formed in a semiconductor substrate of a first conductivity type including a collector region. A base region is formed on the substrate and an emitter region is formed over the base region. At least one of the collector, base and emitter regions includes a first region doped with an impurity having a first concentration and a second region doped with the impurity having a second concentration. Noise performance and reliability of the heterojunction bipolar transistor is improved without degrading ac performance.Type: ApplicationFiled: September 21, 2004Publication date: March 23, 2006Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Peter Geiss, Alvin Joseph, Rajendran Krishnasamy, Xuefeng Liu
-
Publication number: 20060017066Abstract: Methods for fabricating a heterojunction bipolar transistor having a raised extrinsic base is provided in which the base resistance is reduced by forming a silicide atop the raised extrinsic base that extends to the emitter region in a self-aligned manner. The silicide formation is incorporated into a BiCMOS process flow after the raised extrinsic base has been formed. The present invention also provides a heterojunction bipolar transistor having a raised extrinsic base and a silicide located atop the raised extrinsic base. The silicide atop the raised extrinsic base extends to the emitter in a self-aligned manner. The emitter is separated from the silicide by a spacer.Type: ApplicationFiled: September 21, 2005Publication date: January 26, 2006Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Peter Geiss, Marwan Khater, Qizhi Liu, Randy Mann, Robert Purtell, BethAnn Rainey, Jae-Sung Rieh, Andreas Stricker
-
Publication number: 20050199908Abstract: Methods for fabricating a heterojunction bipolar transistor having a raised extrinsic base is provided in which the base resistance is reduced by forming a silicide atop the raised extrinsic base that extends to the emitter region in a self-aligned manner. The silicide formation is incorporated into a BiCMOS process flow after the raised extrinsic base has been formed. The present invention also provides a heterojunction bipolar transistor having a raised extrinsic base and a silicide located atop the raised extrinsic base. The silicide atop the raised extrinsic base extends to the emitter in a self-aligned manner. The emitter is separated from the silicide by a spacer.Type: ApplicationFiled: March 13, 2004Publication date: September 15, 2005Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Peter Geiss, Marwan Khater, Qizhi Liu, Randy Mann, Robert Purtell, BethAnn Rainey, Jae-Sung Rieh, Andreas Stricker
-
Publication number: 20050095787Abstract: A process of forming a nitride film on a semiconductor substrate including exposing a surface of the substrate to a rapid thermal process to form the nitride film.Type: ApplicationFiled: November 19, 2004Publication date: May 5, 2005Applicant: International Business Machines CorporationInventors: Arne Ballantine, Donna Johnson, Matthew Gallagher, Peter Geiss, Jeffrey Gilbert, Shwu-Jen Jeng, Robb Johnson
-
Publication number: 20050070101Abstract: A method for removing silicon dioxide residuals is disclosed. The method includes reacting a portion of a silicon dioxide layer (i.e., oxide) to form a reaction product layer, removing the reaction product layer and annealing in an environment to remove oxide residuals. The method finds application in a variety of semiconductor fabrication processes including, for example, fabrication of a vertical HBT or silicon-to-silicon interface without an oxide interface.Type: ApplicationFiled: September 30, 2003Publication date: March 31, 2005Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Peter Geiss, Alvin Joseph, Xuefeng Liu, James Nakos, James Quinlivan
-
Patent number: 6258695Abstract: A method of reducing the formation of silicon crystal defects due to extrinsic stresses in an integrated circuit chip. The source of such extrinsic stresses may be filling trenches with polycrystalline silicon or oxide, silicides, forming silicon nitride spacers or liners, or during oxide birds-beak formation, or at numerous other processing points. At an appropriate point, as each sensitive feature is defined or formed, carbon co-implanted into the silicon wafer at or near the feature.Type: GrantFiled: February 4, 1999Date of Patent: July 10, 2001Assignee: International Business Machines CorporationInventors: James Dunn, Peter Geiss, Stephen St. Onge
-
Patent number: 6021703Abstract: An active armor for protection against shaped or hollow charge projectiles (1) is formed by a front and a rear sandwich arrangement (2) and (3). The front sandwich arrangement (2) has a splinter jacket as a front outer layer (5), in order to render the main shaped charge of a twin shaped charge ineffective. The rear sandwich arrangement (3) serves in cooperation with the front sandwich arrangement (2) for rendering single shaped charges ineffective.Type: GrantFiled: March 16, 1988Date of Patent: February 8, 2000Assignee: DaimlerChrysler AgInventors: Klaus Peter Geiss, Hans Spengler
-
Patent number: 5750917Abstract: In a tandem warhead, the preliminary shaped charge (5) is arranged at the front end of a spacer (9) which is displaceable toward the front in a guide (12) provided in the preliminary structure (13) of the warhead. Shearing pins (14) are provided for fixing the spacer (9) in the pushed in position. A pyrotechnical element (16) is fastened at the spacer (9). The spacer (9) is provided at its rear end with an annular element (28) which contacts the lining (3) of the main charge (1) in the pushed in position. A pressure space (32) is accordingly formed, so that a high pressure is achieved when the pyrotechnical element (16) is fired, whereupon a recoil occurs due to the propellant gases of the pyrotechnical element (14) flowing out through nozzles (25), which recoil ensures a gentle starting of the spacer (9) into the moved out position.Type: GrantFiled: February 26, 1990Date of Patent: May 12, 1998Assignee: Daimler-Benz Aerospace AGInventors: Joachim Seckler, Klaus-Peter Geiss
-
Patent number: 5685034Abstract: A hospital bed includes a frame assembly having a two-part mattress support comprised of a head mattress support and a foot mattress support, with the head mattress support including a head portion and a horizontal ramp articulated to one another, and with the foot mattress support including an front portion and a rear portion articulated to one another. The head mattress support is movable in a horizontal direction relative to the foot mattress support and tiltable in a vertical direction while the front portion of the foot mattress support is tiltable in a vertical direction, with the rear portion of the foot matress support movable between outer and inner positions to allow formation of an opening when the rear portion of the foot mattress support is moved to inner position. An upwardly open toilet pan which is supported by the frame assembly is movable in position for vertical registry with the opening when the rear portion of the foot mattress support occupies the inner position.Type: GrantFiled: February 26, 1996Date of Patent: November 11, 1997Inventors: Johannes-Konrad Kleer, Joachim Konig, Michael Hehl, Peter Geiss