Patents by Inventor Peter J. A. Naus

Peter J. A. Naus has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5243345
    Abstract: A sigma-delta modulator comprising a low-pass filter of the Nth order, which is constituted by a series combination of N first-order integrating sections (6.1, 6.2, 6.3, . . . , 6.N) each comprising an integrator (12.1, 12.2, 12.3, . . . , 12. N) and a limiter (14.1, 14.2, 14.3, . . . , 14.N). The individual output signals of the sections are weighted by means of corresponding weighting amplifiers (16.1, 16.2, 16.3, . . . , 16.N) and the weighted signals are added together by an adder stage (18). The gains of the sections and the limit values of the limiters are selected so that the last limiter (14.N) in the series arrangement is activated first as the input signal level to the sigma-delta modulator increases, then the last-but-one limiter, and so on. This reduces the order of the filter system each time by one section as the input signal level increases above each successive limit value, thereby causing the sigma-delta modulator to remain stable at all signal levels.
    Type: Grant
    Filed: February 21, 1992
    Date of Patent: September 7, 1993
    Assignee: U.S. Philips Corporation
    Inventors: Peter J. A. Naus, Eise C. Dijkmans, Petrus A. C. M. Nuijten
  • Patent number: 5107480
    Abstract: A signal processor produces a digital signal (Vd), which may be derived from digital information recorded on an information carrier, and applies it to a peak detector for generating a control signal (Vr) which corresponds to the peak value of the digital signal. The digital signal is also applied to a digital amplifier whose gain is controllable by the control signal so that the resulting amplified digital signal (Vv) will drive a digital-to-analog converter to the maximum extent of its conversion range, thereby maximizing the analog output signal (Va) of the converter. The peak detector may be adapted to produce the control signal in accordance with a peak code (Vp) already recorded on the information carrier, which peak code is derived therefrom by the signal processor and indicates the peak digital value of the recorded digital information.
    Type: Grant
    Filed: April 25, 1990
    Date of Patent: April 21, 1992
    Assignee: U.S. Philips Corporation
    Inventor: Peter J. A. Naus
  • Patent number: 4692737
    Abstract: A time-discrete amplitude-continuous or a time-discrete amplitude-discrete signal is converted in to a 1-bit encoded signal by means of a quantizer, the quantization-error signal being fed back via a loop filter. The transfer function of the loop filter is given by H(Z)=1-(Z-b).sup.n /(Z-a).sup.n, where n.gtoreq.3, b.perspectiveto.1 and 0<a<b. In order to preclude, the input signal of the loop filter is limited by a limiter.
    Type: Grant
    Filed: October 17, 1986
    Date of Patent: September 8, 1987
    Assignee: U.S. Philips Corporation
    Inventors: Eduard F. Stikvoort, Arthur H. M. van Roermund, Peter J. A. Naus