Abstract: To provide thermal relief, particularly of the edge of disk-shaped gate-turn-off GTO thyristors (GTO) as are used in converters in power electronics, at least one cooling segment which is isolated from a GTO cathode metallization of the GTO thyristor segment (GTO) by a gate electrode metallization of a gate electrode is arranged on the edge and laterally adjacent to the GTO thyristor segment (GTO). An insulation layer is provided between a cooling segment metallization and the gate electrode metallization. Cooling segments in an lo outer annular zone can be alternately arranged with GTO thyristor segments (GTO) or offset towards the outside in the radial direction or perpendicular direction thereto. Instead of cooling segments, a p.sup.+ -type GTO emitter layer of the GTO thyristor segments (GTO) can be shortened at the edge in the outer annular zone.

Abstract: In a semiconductor component, a pn junction which emerges at a main surface (2) of a semiconductor substrate (1) at the edge of a highly doped zone (3) is formed by a laterally bounded, highly doped zone (3) extending inwards from a main surface (2) of the semiconductor substrate (1) and by a lightly doped zone surrounding the highly doped zone. The edge of the highly doped zone (3) is formed by a guard zone (6b) whose doping density gradually decreases in a direction parallel to the main surface (2) from the highly doped zone (3) towards the pn junction. Any surface breakdown of the pn junction is prevented by the fact that the guard zone (6b) has a maximum penetration depth near the highly doped zone (3) and that the maximum penetration depth of the guard zone (6b) is greater than the penetration depth of the adjacent highly doped zone (3). The guard zone (6b) has a maximum doping density which does not appreciably exceed 10.sup.15 cm.sup.

Abstract: In a high-reverse-voltage GTO thyristor, a negative beveling (6) with comparatively high beveling angle (.alpha.) is possible as edge contouring as a result of separating the p-type base layer into a central p-type base layer (4) of small depth and high edge concentration and a p-type base edge layer (5) of greater depth and lower edge concentration.The production of the two p-type base layers (4, 5) is preferably carried out by simultaneous diffusion of two acceptors with different diffusion constants.

Abstract: A method for producing a gate turn-off thyristor (GTO) having a semi-conductor substrate (1) with at least one p-conducting anode layer (4), one n-type base layer (6), one p-type base layer (7) which is in electrical contact with a gate, and one n-conducting cathode layer (8) has a cathode layer (8) with a highly doped zone (10) acting as an n.sup.+ emitter and a lightly doped zone (9) in which highly doped zone (10) adjoins the surface of the semi-conductor substrate (1) and has a doping density which is at least an order of magnitude higher than that of the p-type base layer (7), the lightly doped zone (9) is situated between a pn junction J.sub.1, produced by the p-type base layer (7) and the cathode layer (8), and the highly doped zone (10) of the cathode layer (8) including producing the doping profile of the cathode layer in first and second diffusion steps, the depth and the breakdown properties of the pn junction J.sub.

Abstract: In the case of a high blocking-capacity semiconductor component with an anode structure, which provides between the n-type base layer (6) and the anode-side p-type emitter regions (8) an n-doped barrier layer (7), and between the p-type emitter regions (8) emitter short-circuits with short-circuit contact regions (9), by partitioning of the barrier layer (7) into local barrier-layer regions (7a,b) an easily adjustable and simultaneously increased short-circuit resistance (R.sub.s) in the short-circuit path is obtained.

Abstract: In a high-reverse-voltage GTO thyristor, a negative beveling (6) with comparatively high beveling angle (.alpha.) is possible as edge contouring as a result of separating the p-type base layer into a central p-type base layer (4) of small depth and high edge concentration and a p-type base edge layer (5) of greater depth and lower edge concentration.The production of the two p-type base layers (4, 5) is preferably carried out by simultaneous diffusion of two acceptors with different diffusion constants.

Abstract: In a high-power GTO thyristor with anode short-circuits (7) in the anode-side p-type emitter layer (6), the triggering sensitivity is improved by an additional thin and lightly doped p.sup.- -type barrier layer (9) between the anode short-circuits (7) and the n-type base layer (5) without the turn-off process being negatively affected.

Abstract: A reverse-conducting thyristor having an integrated antiparallel diode, wherein an improvement of the switching characteristics is achieved by the fact that a field-controlled thyristor (FCT) is provided as the thyristor. According to a preferred illustrative embodiment, this FCT includes at the cathode side of the thyristor a plurality of alternately arranged n.sup.+ -doped cathode regions and p-doped gate regions, the cathode regions being separated from each other by troughs over the bottoms of which the gate regions extend.

Abstract: A gate turn-off thyristor (GTO) having a semi-conductor substrate (1) with at least one p-conducting anode layer (4), one n-type base layer (6), one p-type base layer (7) which is in electrical contact with a gate, and one n-conducting cathode layer (8) has a cathode layer (8) with a highly doped zone (10) acting as n.sup.+ emitter and a lightly doped zone (9). The highly doped zone (10) adjoins the surface of the semi-conductor substrate (1) and has a doping density which is at least an order of magnitude higher than that of the p-type base layer (7). The lightly doped zone (9) is situated between a pn junction J.sub.1, produced by the p-type base layer (7) and the cathode layer (8), and the highly doped zone (10) of the cathode layer (8). In a preferred embodiment of the invention, the highly doped zone (10) is so structured that the lightly doped zone (9) extends, in a GTO with mesa structure, from the pn junction J.sub.

Abstract: In a controllable power semiconductor component which consists of a plurality of parallel-connected individual elements disposed adjacently to one another, the control contacts of which are connected to a common gate, different line resistances between gate and control contacts are compensated in order to achieve a uniform loading on all individual elements.In a GTO thyristor, the compensation is preferably achieved by adjusting the gate trough resistance (R.sub.G) in the p-type base (3) between gate contact (5) and n-type emitter (2).

Abstract: A field-controlled thyristor having a sequence of layers consisting of anode layer, channel layer and gate regions and cathode regions, which regions are alternately arranged at the cathode side, wherein an improvement in the turn-off gain is achieved by a p-type doping of the side walls of the troughs which separate the cathode regions from each other, and/or by an additional intermediate layer which has low p-type doping and which is arranged between adjacent gate regions.

Abstract: A process for manufacturing a power semiconductor component having a component of this type is presented which has at least three consecutive layers and possessing a high current capacity and small power losses. For contacting the first two layers, the component has first second metallized contact planes, which impress a step-like structure onto a first surface of the component. The steps have a height of between 10 and 20 .mu.m and a width of between 20 and 300 .mu.m. The ratio between the surface area of the first contact plane and the surface area of the second contact plane is between 1 and 4. The first layer is heavily doped and has a maximum thickness of 8 .mu.m, and the second layer is lightly doped and has a maximum thickness of 40 .mu.m. According to the process for manufacturing the component, the surface structure according to the invention is produced essentially by a reactive ion-etching process with a single aluminum mask.

Abstract: A power semiconductor module including a cascade circuit of a low-voltage high-current MOSFET and of a bipolar semiconductor element, for example a field-controlled thyristor, GTO thyristor or Darlington transistor, as a hybrid combination. In this manner, it is possible to achieve a construction, which exhibits low induction and which saves space and which at the same time permits efficient cooling of the module.

Abstract: In thyristor having disconnectable emitter short circuits provided by means of monolithically integrated transistor structure, wherein a simplified production and improved control of the short circuits is achieved by the fact that a bipolar structure is integrated as the transistor structure into the component. In a preferred illustrative embodiment, the n.sup.+ -type emitter layer of the thyristor is interrupted by intermediate spaces in which the transistor structure is in each case disposed.

Abstract: For improving the dynamic characteristics of semiconductor components required to absorb high reverse voltages only in one polarity (diodes, reverse-conducting thyristors and asymmetric thyristors), in many cases structures having an n base consisting of two layers are used. In order to improve the reverse-voltage capability, it is proposed, in a semiconductor component having at least one pn.sup.- n sequence of layers, to select the thickness (S) and the doping of an n stop layer (4) in such a way that the following applies: ##EQU1## where e=elementary charge, .epsilon.=dielectric constant of the semiconductor, N.sub.D =donor concentration, X=path coordinate, 0.8.ltoreq.k.ltoreq.1.0 and E.sub.n =field strength at the n.sup.- n junction. The effect of this measure is that the geometric conditions of the edge chamfering are less stringent. The edge can also be shaped by means of conventional etching processes.

Abstract: A power semiconductor component having a component of this type is presented which has at least three consecutive layers and possessing a high current capacity and small power losses. For contacting the first two layers, the component has first and second metallized contact planes, which impress a step-like structure onto a first surface of the component. The steps have a height of between 10 and 20 .mu.m and a width of between 20 and 300 .mu.m. The ratio between the surface area of the first contact plane and the surface area of the second contact plane is between 1 and 4. The first layer is heavily doped and has a maximum thickness of 8 .mu.m, and the second layer is lightly doped and has a maximum thickness of 40 .mu.m. The invention further includes a process for manufacturing the component, wherein the surface structure according to the invention is produced essentially by a reactive ion-etching process with a single aluminum mask.

Abstract: A process for interrupting load current in a thyristor to switch-off current conduction through the thyristor, as well as a semiconductor module for implementation of the process. In the process, a semiconductor diode is connected in parallel to the thyristor and a photocurrent is produced in the diode to switch-off current conduction in the thyristor, the diode then taking over the load current of the thyristor. The photocurrent can be optionally produced by means of an electro-magnetic radiation (light) or by means of a bombardment with electrons. The process permits considerable reduction in the complexity of the cut-off circuit and separation of this circuit in a galvanic fashion from the load circuit. The semiconductor module provided for implementing the process includes a thyristor and a radiation sensitive diode disposed in parallel with the thyristor and commonly integrated into the thyristor semiconductor structure.