Patents by Inventor Peter Wilson Waldrab

Peter Wilson Waldrab has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • METHOD FOR PRODUCING TRENCH ISOLATION IN SILICON CARBIDE AND GALLIUM NITRIDE AND ARTICLES MADE THEREBY
    Publication number: 20100117188
    Abstract: A method for fabricating a trench in a SiC or GaN semiconductor wafer is provided. The method may include filling the trench with a conformal layer of electrically and/or optically isolating material. A device is also provided.
    Type: Application
    Filed: March 5, 2007
    Publication date: May 13, 2010
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Peter Wilson Waldrab, James William Kretchmer, Jason David Galea
  • METHODS FOR FABRICATING SEMICONDUCTOR STRUCTURES
    Publication number: 20090117722
    Abstract: A method for fabricating a semiconductor structure includes forming a carbon masking layer on a semiconductor layer, forming a protective layer on the carbon masking layer. The method further includes forming an opening in the protective layer and the carbon masking layer and processing the semiconductor layer through the opening to form a first processed region in the semiconductor layer. The method further includes enlarging the opening in the carbon masking layer and performing an additional processing step on the semiconductor layer through the enlarged opening to form a second processed region in the semiconductor layer.
    Type: Application
    Filed: July 26, 2006
    Publication date: May 7, 2009
    Inventors: Jesse Berkley Tucker, Kevin Sean Matocha, Peter Wilson Waldrab, James Howard Schermerhorn, Matthew Morgan Edmonds
  • Methods for fabricating semiconductor structures
    Patent number: 7517807
    Abstract: A method for fabricating a semiconductor structure includes forming a carbon masking layer on a semiconductor layer, forming a protective layer on the carbon masking layer. The method further includes forming an opening in the protective layer and the carbon masking layer and processing the semiconductor layer through the opening to form a first processed region in the semiconductor layer. The method further includes enlarging the opening in the carbon masking layer and performing an additional processing step on the semiconductor layer through the enlarged opening to form a second processed region in the semiconductor layer.
    Type: Grant
    Filed: July 26, 2006
    Date of Patent: April 14, 2009
    Assignee: General Electric Company
    Inventors: Jesse Berkley Tucker, Kevin Sean Matocha, Peter Wilson Waldrab, James Howard Schermerhorn, Matthew Morgan Edmonds