Abstract: An embodiment of the present invention includes a nonvolatile memory system comprising nonvolatile memory for storing sector information, the nonvolatile memory being organized into blocks with each block including a plurality of sectors, each sector identified by a logical block address and for storing sector information. A controller is coupled to the nonvolatile memory for writing sector information to the latter and for updating the sector information, wherein upon updating sector information, the controller writes to the next free or available sector(s) of a block such that upon multiple re-writes or updating of sector information, a plurality of blocks are substantially filled with sector information and upon such time, the controller rearranges the updated sector information in sequential order based on their respective logical block addresses thereby increasing system performance and improving manufacturing costs of the controller.

Abstract: An interfacing system facilitating user-friendly connectivity in a selected operating mode between a host computer system and a flash memory card. The interfacing system includes an interface device and a flash memory card. The interfacing system features significantly expanded operating mode detection capability within the flash memory card and marked reduction in the incorrect detection of the operating mode. The interface device includes a first end for coupling to the host computer and a second end for coupling to the flash memory card, while supporting communication in the selected operating mode which is also supported by the host computer system. The flash memory card utilizes a fifty pin connection to interface with the host computer system through the interface device. The fifty pin connection of the flash memory card can be used with different interface devices in a variety of configurations such as a universal serial mode, PCMCIA mode, and ATA IDE mode.

Abstract: An embodiment of the present invention includes a nonvolatile memory system comprising nonvolatile memory for storing sector information, the nonvolatile memory being organized into blocks with each block including a plurality of sectors, each sector identified by a logical block address and for storing sector information. A controller is coupled to the nonvolatile memory for writing sector information to the latter and for updating the sector information, wherein upon updating sector information, the controller writes to the next free or available sector(s) of a block such that upon multiple re-writes or updating of sector information, a plurality of blocks are substantially filled with sector information and upon such time, the controller rearranges the updated sector information in sequential order based on their respective logical block addresses thereby increasing system performance and improving manufacturing costs of the controller.

Abstract: A flash memory system segregates overhead data from user data so that overhead data may be addressed, programmed and erased independently from user data. The non-volatile memory medium of a flash memory system is mapped into a plurality of separately addressable memory blocks that are independently programmable and independently erasable, including a plurality of Dedicated Overhead Blocks and Dedicated Data Blocks. The Dedicated Overhead Blocks are mapped according to a plurality of distinguishably addressable segments, and include a first Dedicated Overhead Block and a second Dedicated Overhead Block. User Data defined by a VLBA is stored in a Dedicated Data Block within the flash memory.

Abstract: In one embodiment of the present invention, a memory storage system for storing information organized in sectors within a nonvolatile memory bank is disclosed. The memory bank is defined by sector storage locations spanning across one or more rows of a nonvolatile memory device, each the sector including a user data portion and an overhead portion. The sectors being organized into blocks with each sector identified by a host provided logical block address (LBA). Each block is identified by a modified LBA derived from the host-provided LBA and said virtual PBA, said host-provided LBA being received by the storage device from the host for identifying a sector of information to be accessed, the actual PBA developed by said storage device for identifying a free location within said memory bank wherein said accessed sector is to be stored.

Abstract: An interfacing system facilitating user-friendly connectivity in a selected operating mode between a host computer system and a flash memory card. The interfacing system includes an interface device and a flash memory card. The interfacing system features significantly expanded operating mode detection capability within the flash memory card and marked reduction in the incorrect detection of the operating mode. The interface device includes a first end for coupling to the host computer and a second end for coupling to the flash memory card, while supporting communication in the selected operating mode which is also supported by the host computer system. The flash memory card utilizes a fifty pin connection to interface with the host computer system through the interface device. The fifty pin connection of the flash memory card can be used with different interface devices in a variety of configurations such as a universal serial mode, PCMCIA mode, and ATA IDE mode.

Abstract: In one embodiment of the present invention, a memory storage system for storing information organized in sectors within a nonvolatile memory bank is disclosed. The memory bank is defined by sector storage locations spanning across one or more rows of a nonvolatile memory device, each the sector including a user data portion and an overhead portion. The sectors being organized into blocks with each sector identified by a host provided logical block address (LBA). Each block is identified by a modified LBA derived from the host-provided LBA and said virtual PBA, said host-provided LBA being received by the storage device from the host for identifying a sector of information to be accessed, the actual PBA developed by said storage device for identifying a free location within said memory bank wherein said accessed sector is to be stored.

Abstract: In one embodiment of the present invention, a memory storage system for storing information organized in sectors within a nonvolatile memory bank is disclosed. The memory bank is defined by sector storage locations spanning across one or more rows of a nonvolatile memory device, each the sector including a user data portion and an overhead portion. The sectors being organized into blocks with each sector identified by a host provided logical block address (LBA). Each block is identified by a modified LBA derived from the host-provided LBA and said virtual PBA, said host-provided LBA being received by the storage device from the host for identifying a sector of information to be accessed, the actual PBA developed by said storage device for identifying a free location within said memory bank wherein said accessed sector is to be stored.

Abstract: A device is disclosed for storing mapping information for mapping a logical block address identifying a block being accessed by a host to a physical block address, identifying a free area of nonvolatile memory, the block being selectively erasable and having one or more sectors that may be individually moved. The mapping information including a virtual physical block address for identifying an “original” location, within the nonvolatile memory, wherein a block is stored and a moved virtual physical block address for identifying a “moved” location, within the nonvolatile memory, wherein one or more sectors of the stored block are moved. The mapping information further including status information for use of the “original” physical block address and the “moved” physical block address and for providing information regarding “moved” sectors within the block being accessed.

Abstract: A device is disclosed for storing mapping information for mapping a logical block address identifying a block being accessed by a host to a physical block address, identifying a free area of nonvolatile memory, the block being selectively erasable and having one or more sectors that may be individually moved. The mapping information including a virtual physical block address for identifying an “original” location, within the nonvolatile memory, wherein a block is stored and a moved virtual physical block address for identifying a “moved” location, within the nonvolatile memory, wherein one or more sectors of the stored block are moved. The mapping information further including status information for use of the “original” physical block address and the “moved” physical block address and for providing information regarding “moved” sectors within the block being accessed.

Abstract: An embodiment of the present invention includes a high speed multi-media card system for automatic detection of high speed communication including a host and one or more media cards, coupled to the host through a one or more of data lines, at least one of which is a serial data line. The one or more media cards each have a unique card identification number (CID) associated therewith. In response to a first command from the host requesting each card's unique CID and responsive thereto, said one or more media cards send their respective CID, through the serial data line, to the host and if the sent CID matches that which is expected from the host, the host transmits a second command assigning a relative card address (RCA) to the card whose CID made the match.

Abstract: An embodiment of the present invention includes a digital equipment system comprising a host for sending commands to read or write files having sectors of information, each sector having and being modifyable on a bit-by-bit, byte-by-byte or word-by-word basis. The host being operative to receive responses to the commands. The digital equipment further including a controller device responsive to the commands and including one-time-programmable nonvolatile memory for storing information organized into sectors, based on commands received from the host, and upon commands from the host to re-write a sector, the controller device for re-writing said sector on a bit-by-byte or word-for-word basis.

Abstract: An embodiment of the present invention includes a digital equipment system comprising a host for sending commands to read or write files having sectors of information, each sector having and being modifyable on a bit-by-bit, byte-by-byte or word-by-word basis. The host being operative to receive responses to the commands. The digital equipment further including a controller device responsive to the commands and including one-time-programmable nonvolatile memory for storing information organized into sectors, based on commands received from the host, and upon commands from the host to re-write a sector, the controller device for re-writing said sector on a bit-by-bit, byte-by-byte or word-for-word basis.

Abstract: An embodiment of the present invention includes a nonvolatile memory card including a controller and nonvolatile memory coupled to the controller, the controller causing communication between the nonvolatile memory and a host, the nonvolatile memory including active memory for securing access to the card.

Abstract: A nonvolatile semiconductor mass storage system and architecture can be substituted for a rotating hard disk. The system and architecture avoid an erase cycle each time information stored in the mass storage is changed. Erase cycles are avoided by programming an altered data file into an empty mass storage block rather than over itself as a hard disk would. Periodically, the mass storage will need to be cleaned up. These advantages are achieved through the use of several flags, and a map to correlate a logical block address of a block to a physical address of that block. In particular, flags are provided for defective blocks, used blocks, and old versions of a block. An array of volatile memory is addressable according to the logical address and stores the physical address.

Abstract: In accordance with an embodiment of the present invention, an electronic device is displayed for purchase by a user and includes a controller and a protected area for storing a key and a bar code associated with and for identifying the device including a password unique to the device, wherein upon purchase of the device, the password is compared to the key and upon successful activation thereof, the device is activated, otherwise, the device is rendered inoperable.

Abstract: An embodiment of the present invention includes a digital equipment system having a host for sending write commands to write files having sector information and having a controller device responsive to the commands for writing and updating FSInfo sector information. The controller controls a nonvolatile memory system organized into blocks, each block including a plurality of sector locations for storing sector information, a particular free block, designated for storing FSInfo sector information. Upon updating of the FSInfo sector, the updated FSInfo sector information is written to a next free sector of the dedicated block thereby avoiding moving the sectors of the particular block to another block, hence, improving system performance.

Abstract: A method and circuit for fast memory access (read or write) of the data to and from a memory array is disclosed. Architecture wise, the memory array control circuit provides for at least two address latches and two page registers. The first address latch contains a first data address and the second address latch contains a second data address. The first data address is decoded first and sent to the memory array to access (read or write) the corresponding data from the memory array. When the data of the first data address is being accessed, the decoding process will begin for a second data address. When the data of the first data address has been accessed, the second data address is ready for the memory array. Thus, there can be continuous fetching from or writing to the memory array. In the preferred embodiment, there are two page registers. In a read operation, the data read from the first data address is transferred to a first page register.

Abstract: A method and circuit for fast memory access (read or write) of the data to and from a memory array is disclosed. Architecture wise, the memory array control circuit provides for at least two address latches and two page registers. The first address latch contains a first data address and the second address latch contains a second data address. The first data address is decoded first and sent to the memory array to access (read or write) the corresponding data from the memory array. When the data of the first data address is being accessed, the decoding process will begin for a second data address. When the data of the first data address has been accessed, the second data address is ready for the memory array. Thus, there can be continuous fetching from or writing to the memory array. In the preferred embodiment, there are two page registers. In a read operation, the data read from the first data address is transferred to a first page register.

Abstract: In one embodiment of the present invention, a memory storage system for storing information organized in sectors within a nonvolatile memory bank is disclosed. The memory bank is defined by sector storage locations spanning across one or more rows of a nonvolatile memory device, each the sector including a user data portion and an overhead portion. The sectors being organized into blocks with each sector identified by a host provided logical block address (LBA). Each block is identified by a modified LBA derived from the host-provided LBA and said virtual PBA, said host-provided LBA being received by the storage device from the host for identifying a sector of information to be accessed, the actual PBA developed by said storage device for identifying a free location within said memory bank wherein said accessed sector is to be stored.