Patents by Inventor Philip E. Mauger

Philip E. Mauger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6556417
    Abstract: A method to construct a capacitive transducers comprising the steps of forming over and in a planar surface of a substrate at least one rigid electrode of a variable-area capacitor electrically connected to a location on said substrate reserved for electrode attachment; providing a cooperating flexible electrode with a dielectric layer; and bonding said flexible electrode to said substrate in a surface region surrounding said rigid electrode.
    Type: Grant
    Filed: April 13, 2001
    Date of Patent: April 29, 2003
    Inventors: Robert B. McIntosh, Philip E. Mauger, Steven R. Patterson
  • Publication number: 20010020320
    Abstract: A method to construct a capacitive transducer comprising the steps of forming over and in a planar surface of a substrate at least one rigid electrode of a variable-area capacitor electrically connected to a location on said substrate reserved for electrode attachment; providing a cooperating flexible electrode with a dielectric layer; and bonding said flexible electrode to said substrate in a surface region surrounding said rigid electrode.
    Type: Application
    Filed: April 13, 2001
    Publication date: September 13, 2001
    Inventors: Robert B. McIntosh, Philip E. Mauger, Steven R. Patterson
  • Patent number: 6151967
    Abstract: A variable area capacitor with a flexible electrode responsive to a physical effect and a rigid electrode with a predetermined surface contour. The surface contour is dimensioned to provide a specific change in capacitance with deflection of the flexible electrode. A thin dielectric layer maintains a substantially fixed spacing between the two electrodes. Preferred embodiments include a pressure sensor, microphone and accelerometer. A differential transconductance amplifier detects changes of the variable capacitor in a low-impedance, bridge-like circuit and feeds back current to balance the bridge. The voltage that controls the feedback current is proportional to capacitance over a wide dynamic range.
    Type: Grant
    Filed: March 10, 1998
    Date of Patent: November 28, 2000
    Assignee: Horizon Technology Group
    Inventors: Robert B. McIntosh, Philip E. Mauger, Steven R. Patterson, Gene A. Goodman
  • Patent number: 5110373
    Abstract: A method for fabricating a silicon membrane with predetermined stress characteristics. A silicon substrate is doped to create a doped layer as thick as the desired thickness of the membrane. Stress within the doped layer is controlled by selecting the dopant based on its atomic diameter relative to silicon and controlling both the total concentration and concentration profile of the dopant. The membrane is then formed by electrochemically etching away the substrate beneath the doped layer.
    Type: Grant
    Filed: August 9, 1990
    Date of Patent: May 5, 1992
    Assignee: Nanostructures, Inc.
    Inventor: Philip E. Mauger
  • Patent number: 4966663
    Abstract: A method for fabricating a silicon membrane with predetermined stress characteristics. A silicon substrate is doped to create a doped layer as thick as the desired thickness of the membrane. Stress within the doped layer is controlled by selecting the dopant based on its atomic diameter relative to silicon and controlling both the total concentration and concentration profile of the dopant. The membrane is then formed by electrochemically etching away the substrate beneath the doped layer.
    Type: Grant
    Filed: September 13, 1988
    Date of Patent: October 30, 1990
    Assignee: Nanostructures, Inc.
    Inventor: Philip E. Mauger
  • Patent number: 4919749
    Abstract: A high resolution shadow mask with low pattern distortion is formed from a silicon membrane with a pattern of apertures etched through the membrane by reactive ion etching using a silicon dioxide masking layer. To achieve low distortion over a large area membrane, the stress of the membrane and the masking layer is controlled to remain within an optimal range so that the stress relief that occurs when the apertures are formed is kept negligibly small. A silicon membrane with controlled stress is made using a p/n junction electrochemical etch-stop process. After making the membrane, it is then coated with a deposited silicon dioxide layer. The stress of the oxide layer may be adjusted to an optimum value by annealing after deposition. The membrane with the oxide mask layer is next coated with a photoresist layer which is then patterned with the desired shadow mask pattern. Once the photoresist is patterned, the pattern is then transferred into the oxide layer by reactive ion etching.
    Type: Grant
    Filed: May 26, 1989
    Date of Patent: April 24, 1990
    Assignee: Nanostructures, Inc.
    Inventors: Philip E. Mauger, Alex R. Shimkunas, Junling J. Yen