Abstract: A method and apparatus for identifying a radio transmitter. The transient frequency or phase history of the turn-on characteristics of a transmitter is detected and digitized. The history can be analyzed by a microprocessor operating a computer program to gather transient phase information from an unknown transmitter and to classify the transmitter in accordance with a transient characteristic.

Abstract: Disclosed is a scrambler/encryption system for randomizing an information-containing data signal for transmission and for reproducing the original information at a receiver. The information-containing data to be transmitted, encoded with a preselected base of a numeric system, is applied to a modulo adder appropriate for that base. An output of the modulo adder is applied as an input to a multistage shift register. An arbitrary logic networ, having a plurality of inputs, connected to a plurality of stages of the shift register, responds to the arbitrary logic's selected code and the contents in the register by delivering an output signal to the modulo adder. At the receiver the inverse operation is accomplished by a circuit which includes substantially the same components except the modulo adder receives the scrambled/encrypted input signal which is fed into the receiver's shift register.

Abstract: In a triplex redundant digital control system, one of three computer units is selected for controlling a digital flight control system by using fault scoring and selection logic circuitry that responds to discrete signals produced by the computer units that represent both self-test and cross-test information on the health of the three available units. The self-test and cross-test discrete information signals are received and processed by the selection logic circuit in accordance with a fault-scoring scheme in which the self-test scores are accorded different and, in particular, greater weight than the cross-test scores and a computer unit exhibiting the lowest combined self- and cross-test fault score is selected as the computer in control. The circuitry also includes memory devices for storing the fault scores associated with previous fault conditions so that a previously unfailed computer unit is selected over a previously failed but currently healthy computer.

Abstract: A scrambler/encryption system for randomizing an information-containing data signal for transmission and for reproducing at the receiver the information-containing data signal. The information-containing data to be transmitted is applied to a modulo-two adder, the output of which is the encoded data for transmission and which is also an input of an n stage shift register. An arbitrary logic network, having a plurality of inputs each connected to a plurality of selected shift register stages, produces a particular key signal responsive to the condition of the contents of the selected shift register stages. At the receiver, the received randomized data is fed simultaneously to the input of an n stage shift register and to an input of a modulo-two adder. An identical arbitrary logic network is connected to the receiver shift register and produces the same particular key signal responsive to the same conditions in the shift register. The modulo-two adder in the receiver has as its second input the key signal.