Patents by Inventor Philip J. Fye

Philip J. Fye has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • VLSI embedded RAM test
    Patent number: 5471482
    Abstract: A method for comprehensively testing embedded RAM devices and a means for detecting if any of the cells within the embedded RAM devices have a slow write recovery time. The preferred mode of the present invention utilizes built-in self-test (BIST) techniques for testing the embedded RAM's within a VLSI device. In accordance with the present invention, a modified 5N march test sequence is performed on the embedded RAM devices. The modified 5N March test sequence is a simple algorithm implemented in programmable hardware that has the capability of ensuring that the embedded RAM devices are functional and that they meet the recovery time requirements. The preferred mode of the present invention uses this algorithm to determine if the embedded RAMs are operating properly before the VLSI devices are used in card assembly. However, this method can also be used after card assembly to monitor the embedded RAM's integrity.
    Type: Grant
    Filed: April 5, 1994
    Date of Patent: November 28, 1995
    Assignee: Unisys Corporation
    Inventors: Larry L. Byers, Donald W. Mackenthun, Philip J. Fye, Gerald J. Maciona, Jeff A. Engel, Ferris T. Price, deceased, Dale K. Seppa