Patents by Inventor Philip J. Kuekes

Philip J. Kuekes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7875480
    Abstract: A method of making a sensor comprises substantially laterally growing at least one nanowire having at least two segments between two electrodes, whereby a junction or connection is formed between the at least two segments; and establishing a sensing material adjacent to the junction or connection, and adjacent to at least a portion of each of the at least two segments, wherein the sensing material has at least two states.
    Type: Grant
    Filed: July 27, 2009
    Date of Patent: January 25, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Theodore I. Kamins, Philip J. Kuekes, Carrie L. Donley, Jason J. Blackstock
  • Patent number: 7872502
    Abstract: One embodiment of the present invention is a method for constructing defect-and-failure-tolerant demultiplexers. This method is applicable to nanoscale, microscale, or larger-scale demultiplexer circuits. Demultiplexer circuits can be viewed as a set of AND gates, each including a reversibly switchable interconnection between a number of address lines, or address-line-derived signal lines, and an output signal line. Each reversibly switchable interconnection includes one or more reversibly switchable elements. In certain demultiplexer embodiments, NMOS and/or PMOS transistors are employed as reversibly switchable elements. In the method that represents one embodiment of the present invention, two or more serially connected transistors are employed in each reversibly switchable interconnection, so that short defects in up to one less than the number of serially interconnected transistors does not lead to failure of the reversibly switchable interconnection.
    Type: Grant
    Filed: July 12, 2006
    Date of Patent: January 18, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Warren Robinett, Philip J. Kuekes, R. Stanley Williams
  • Patent number: 7869714
    Abstract: An electronic system includes a first circuit board having a first optical element and a second circuit board having a second optical element positioned to electronically communicate with the first optical element over free space. The system also includes a cold plate having openings positioned to enable the optical communications over free space is positioned between the first circuit board and the second circuit board. The system further includes a condenser and a fluid conduit containing a cooling fluid configured to absorb heat through the cold plate and to convey the heat to the condenser, where the fluid conduit connects the cold plate and the condenser.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: January 11, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Chandrakant Patel, Shih-Yuan Wang, Philip J. Kuekes, R. Stanley Williams
  • Publication number: 20100302625
    Abstract: Various embodiments of the present invention are directed to systems and methods for obtaining images of objects with higher resolution than the diffraction limit. In one aspect, a method for collecting evanescent waves scattered from an object comprises electronically configuring a reconfigurable device to operate as a grating for one or more lattice periods using a computing device. Propagating waves scattered from the object pass through the reconfigurable device and a portion of evanescent waves scattered from the object are projected into the far field of the object. The method includes detecting propagating waves and detecting the portion of evanescent waves projected into the far field for each lattice period using an imaging system.
    Type: Application
    Filed: May 28, 2009
    Publication date: December 2, 2010
    Inventors: Jingjing Li, Philip J. Kuekes
  • Publication number: 20100293518
    Abstract: One embodiment of the present invention provides a demultiplexer implemented as a nanowire crossbar or a hybrid nanowire/microscale-signal-line crossbar with resistor-like nanowire junctions. The demultiplexer of one embodiment provides demultiplexing of signals input on k microscale address lines to 2k or fewer nanowires, employing supplemental, internal address lines to map 2k nanowire addresses to a larger, internal, n-bit address space, where n>k. A second demultiplexer embodiment of the present invention provides demultiplexing of signals input on n microscale address lines to 2k nanowires, with n>k, using 2k, well-distributed, n-bit external addresses to access the 2k nanowires.
    Type: Application
    Filed: January 23, 2008
    Publication date: November 18, 2010
    Inventors: Philip J. Kuekes, J. Warren Robinett, Gadiel Seroussl, R. Stanley Williams
  • Patent number: 7803712
    Abstract: A mold with a protruding pattern is provided that is pressed into a thin polymer film via an imprinting process. Controlled connections between nanowires and microwires and other lithographically-made elements of electronic circuitry are provided. An imprint stamp is configured to form arrays of approximately parallel nanowires which have (1) micro dimensions in the X direction, (2) nano dimensions and nano spacing in the Y direction, and three or more distinct heights in the Z direction. The stamp thus formed can be used to connect specific individual nanowires to specific microscopic regions of microscopic wires or pads. The protruding pattern in the mold creates recesses in the thin polymer film, so the polymer layer acquires the reverse of the pattern on the mold. After the mold is removed, the film is processed such that the polymer pattern can be transferred on a metal/semiconductor pattern on the substrate.
    Type: Grant
    Filed: December 7, 2006
    Date of Patent: September 28, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Pavel Kornilovich, Yong Chen, Duncan Stewart, R. Stanley Williams, Philip J. Kuekes, Mehmet Fatih Yanik
  • Patent number: 7804175
    Abstract: Semiconductor structures are disclosed including a substrate comprising a semiconductor material and having opposed first and second surfaces, and at least one conductive via extending from the first surface to the second surface. The conductive vias can extend at angles relative to the first surface, such as acute angles or 90°. The conductive vias can include segments that extend at different angles. Methods of forming conductive vias in semiconductor structures are provided. In the methods, a thermal gradient is applied in combination with an electric field to form conductive vias.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: September 28, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Theodore I. Kamins, Philip J. Kuekes
  • Patent number: 7786467
    Abstract: Various embodiments of the present invention include three-dimensional, at least partially nanoscale, electronic circuits and devices in which signals can be routed in three independent directions, and in which electronic components can be fabricated at junctions interconnected by internal signal lines. The three-dimensional, at least partially nanoscale, electronic circuits and devices include layers, the nanowire or microscale-or-submicroscale/nanowire junctions of each of which may be economically and efficiently fabricated as one type of electronic component. Various embodiments of the present invention include nanoscale memories, nanoscale programmable arrays, nanoscale multiplexers and demultiplexers, and an almost limitless number of specialized nanoscale circuits and nanoscale electronic components.
    Type: Grant
    Filed: April 25, 2005
    Date of Patent: August 31, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: R. Stanley Williams, Philip J. Kuekes
  • Patent number: 7778061
    Abstract: Various embodiments of the present invention are directed to crossbar-memory systems to methods for writing information to and reading information stored in such systems. In one embodiment of the present invention, a crossbar-memory system comprises a first layer of microscale signal lines, a second layer of microscale signal lines, a first layer of nanowires configured so that each first layer nanowire overlaps each first layer microscale signal line, and a second layer of nanowires configured so that each second layer nanowire overlaps each second layer microscale signal line and overlaps each first layer nanowire. The crossbar-memory system includes nonlinear-tunneling resistors configured to selectively connect first layer nanowires to first layer microscale signal lines and to selectively connect second layer nanowires to second layer microscale signal lines.
    Type: Grant
    Filed: October 16, 2006
    Date of Patent: August 17, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Warren Robinett, Philip J. Kuekes
  • Patent number: 7760506
    Abstract: Electronic components, systems and apparatus including one or more air flow devices, such as an aerodynamic element and/or an air diverter.
    Type: Grant
    Filed: June 6, 2007
    Date of Patent: July 20, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Shih-Yuan Wang, Philip J. Kuekes, Chandrakant Patel
  • Publication number: 20100165431
    Abstract: Various embodiments of the present invention relate to dynamically reconfigurable hologram comprising a phase-modulation layer and an intensity-control layer. The phase modulation layer comprises an electronically programmable erasable negative index material crossbar. The crossbar includes a first layer of approximately parallel nanowires (502) and a second layer of approximately parallel nanowires (504) that overlay the nanowires in the first layer. The nanowires in the first and second layers have substantially regularly spaced fingers. The crossbar also includes resonant elements (812) comprising two fingers of a nanowire in the first layer, two fingers of a nanowire in the second layer, and an intermediate layer (1006,1302) sandwiched between the nanowire in the first layer and the nanowire in the second layer. The refractive index of each resonant element is controlled by changing the charge density within the intermediate layer.
    Type: Application
    Filed: December 29, 2008
    Publication date: July 1, 2010
    Inventors: Jingjing Li, Philip J. Kuekes, Shih-Yuan Wang
  • Patent number: 7741638
    Abstract: A control layer for use in a junction of a nanoscale electronic switching device is disclosed. The control layer includes a material that is chemically compatible with a connecting layer and at least one electrode in the nanoscale switching device. The control layer is adapted to control at least one of electrochemical reaction paths, electrophysical reaction paths, and combinations thereof during operation of the device.
    Type: Grant
    Filed: November 23, 2005
    Date of Patent: June 22, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Duncan Stewart, Douglas Ohlberg, R. Stanley Williams, Philip J. Kuekes
  • Publication number: 20100112809
    Abstract: A mold with a protruding pattern is provided that is pressed into a thin polymer film via an imprinting process. Controlled connections between nanowires and microwires and other lithographically-made elements of electronic circuitry are provided. An imprint stamp is configured to form arrays of approximately parallel nanowires which have (1) micro dimensions in the X direction, (2) nano dimensions and nano spacing in the Y direction, and three or more distinct heights in the Z direction. The stamp thus formed can be used to connect specific individual nanowires to specific microscopic regions of microscopic wires or pads. The protruding pattern in the mold creates recesses in the thin polymer film, so the polymer layer acquires the reverse of the pattern on the mold. After the mold is removed, the film is processed such that the polymer pattern can be transferred on a metal/semiconductor pattern on the substrate.
    Type: Application
    Filed: December 7, 2006
    Publication date: May 6, 2010
    Inventors: Pavel Kornilovich, Yong Chen, Duncan Stewart, R. Stanley Williams, Philip J. Kuekes, Mehmet Fatih Yanik
  • Publication number: 20100091662
    Abstract: Embodiments of the present invention include defect-tolerant demultiplexer crossbars that employ, or that can be modeled by demultiplexer crossbars that employ, threshold logic “TL” elements. The threshold-logic elements provide for tolerance for signal variation on internal signals lines of a defect-tolerant demultiplexer crossbar, and thus tolerance for defects which produce internal signal variation.
    Type: Application
    Filed: October 15, 2008
    Publication date: April 15, 2010
    Inventors: Ron M. Roth, Joseph Warren Robinett, Philip J. Kuekes, R. Stanley Williams
  • Publication number: 20100094580
    Abstract: Embodiments of the present invention are directed to cost-effective defect amelioration in manufactured electronic devices that include nanoscale components. Certain embodiments of the present invention are directed to amelioration of defects in electronic devices that contain nanoscale demultiplexers. In certain embodiments of the present invention, the nanoscale-demultiplexer-containing devices include reconfigurable encoders. In one embodiment of the present invention, the table of codes within a reconfigurable encoder is permuted, and a device is configured in accordance with the permuted codes, in order to produce a permuted table of codes that, when input to an appropriately configured nanoscale demultiplexer, produces correct outputs despite defects in the nanoscale demultiplexer.
    Type: Application
    Filed: October 15, 2008
    Publication date: April 15, 2010
    Inventors: Joseph Warren Robinett, Philip J. Kuekes, R. Stanley Williams
  • Patent number: 7691201
    Abstract: A method of forming an assembly of isolated nanowires of at least one material within a matrix of another material is provided. The method comprises: providing a substrate; forming a catalyst array on a major surface of the substrate; growing an array of the nanowires corresponding with the catalyst array, the nanowires, each comprising at least one material; and forming a matrix of another material that fills in spaces between the nanowires. The method is useful for producing a variety of structures useful in a number of devices, such as photonic bandgap structures and quantum dot structures.
    Type: Grant
    Filed: October 21, 2003
    Date of Patent: April 6, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Theodore I. Kamins, Philip J. Kuekes
  • Patent number: 7692840
    Abstract: An apparatus for controlling propagation of incident electromagnetic radiation is described, comprising a composite material having electromagnetically reactive cells of small dimension relative to a wavelength of the incident electromagnetic radiation. At least one of a capacitive and inductive property of at least one of the electromagnetically reactive cells is temporally controllable to allow temporal control of an associated effective refractive index encountered by the incident electromagnetic radiation while propagating through the composite material.
    Type: Grant
    Filed: June 4, 2008
    Date of Patent: April 6, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Philip J Kuekes, Shih-Yuan Wang, Raymond G Beausoleil, Alexandre M. Bratkovski, Wei Wu, M. Saif Islam
  • Patent number: 7657137
    Abstract: A photonic interconnect system avoids high capacitance electric interconnects by using optical signals to communicate data between devices. The system can provide massively parallel information output by mapping logical addresses to frequency bands, so that modulation of a selected frequency band can encode information for a specific location corresponding to the logical address. Wavelength-specific directional couplers, modulators, and detectors for the photonic interconnect system can be efficiently fabricated at defects in a photonic bandgap crystal. The interconnect system can be used for both classical and quantum information processing.
    Type: Grant
    Filed: January 11, 2008
    Date of Patent: February 2, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Raymond G. Beausoleil, Philip J. Kuekes, William J. Munro, Timothy P. Spiller, Richard S. Williams, Sean D. Barrett
  • Patent number: 7652911
    Abstract: Methods for inputting a data-value pattern into a nanowire crossbar, for inputting a data-value pattern into a nanowire crossbar that support computer instructions stored in a computer-readable medium, and for distributing a received data value to each of a set of nanowires that support control logic implemented in logic circuits are provided. First and second nanoscale shift registers are employed, the first having output signal lines that form or interconnect with a first parallel set of nanowire-crossbar nanowires and the second having output signal lines that form or interconnect with a second parallel set of nanowire-crossbar nanowires. A first pattern of values is stored in the first shift register and a second pattern of values is stored in the second shift register using voltage signals below the WRITE voltage for junctions of the crossbar. Voltage signals greater than or equal to the WRITE threshold are applied for junctions of the crossbar to write the pattern of data values into the crossbar.
    Type: Grant
    Filed: December 10, 2008
    Date of Patent: January 26, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Gregory S. Snider, Philip J. Kuekes
  • Publication number: 20090294755
    Abstract: A patterned array of metallic nanostructures and fabrication thereof is described. A device comprises a patterned array of metallic columns vertically extending from a substrate. Each metallic column is formed by metallically coating one of an array of non-metallic nanowires catalytically grown from the substrate upon a predetermined lateral pattern of seed points placed thereon according to a nanoimprinting process. An apparatus for fabricating a patterned array of metallic nanostructures is also described.
    Type: Application
    Filed: July 27, 2009
    Publication date: December 3, 2009
    Inventors: Philip J. Kuekes, M. Saif Islam, Shih-Yuan Wang, Alexandre M. Bratkovaski