Abstract: A computer implemented method and system for managing power in a 3D chip stack formed of multiple memory layers each having a plurality memory banks and a plurality of Through-Silicon-Vias (TSVs) connecting the memory banks. The TSVs are arranged in a plurality of subsets, each subset of TSVs connecting a corresponding vertical stack of memory banks aligned across a plurality of memory layers. The method includes determining a power delivery budget for each subset of TSVs connecting the corresponding vertical stack of memory banks based on memory requests, keeping track of memory requests to the memory banks of each vertical stack of memory banks and scheduling the memory requests to the memory banks of each vertical stack of memory banks based on the power budget. The memory controller is configured with a scorecard scheduler to manage the memory requests based on the power budget.

Abstract: Devices in enterprise-scale networks are often tracked by asset catalogs that record the physical locations of respective devices. Such tracking often involves administratively heavy communication of device deployment, and communication or recording errors may lead to missing catalog entries or entries that incorrectly identify the physical locations of the devices. Instead, a MAC address encoding may be established that maps physical locations to particular MAC addresses, such as representing a building, floor, room, row, and rack of a device in the second through sixth MAC address octets. A locator device with a network adapter featuring a selected MAC address that encodes a particular physical address may be inserted into a network device at the physical location. The physical location of the network device may thereafter be queried for the MAC addresses of connected devices, and the selected MAC address may be translated into the physical location of the network device.

Abstract: A system and method of supporting point-to-point synchronization among processes/nodes implementing different hardware barriers in a tuple space/coordinated namespace (CNS) extended memory storage architecture. The system-wide CNS provides an efficient means for storing data, communications, and coordination within applications and workflows implementing barriers in a multi-tier, multi-nodal tree hierarchy. The system provides a hardware accelerated mechanism to support barriers between the participating processes. Also architected is a tree structure for a barrier processing method where processes are mapped to nodes of a tree, e.g., a tree of degree k, to provide an efficient way of scaling the number of processes in a tuple space/coordination namespace.

Abstract: Scatter gather operation(s) are performed by accessing a shared memory that is shared amongst nodes interconnected through network(s) and having a CNS shared amongst the nodes. Data is gathered from multiple processes at corresponding multiple nodes into location(s) in the CNS, and tuple(s) having a same tuple name are created in the CNS. The tuple(s) have information referencing the gathered data in the location(s). Alternatively, data that has been gathered using the same tuple name is scattered to multiple processes participating in the CNS. The scattering uses the tuple(s) in the CNS, and is performed from the location(s) into other location(s) at one or multiple nodes for one or multiple processes at the corresponding one or multiple nodes. Both the gathering data and the scattering data may also be performed.

Abstract: A system and method for federating a tuple storage database across multiple coordinated namespace (CNS) extended memory storage systems allowing the sharing of tuples and tuple data across independent systems. The method provides a federation service for multiple coordination namespace systems. The method retrieves a tuple from connected independent CNS systems wherein a local CNS Controller sends a read request to the local gatekeeper to retrieve a first tuple and creates a local pending remote record. The local gatekeeper at a requesting node sends a broadcast query to a plurality of remote gatekeepers for the tuple and Remote gatekeepers at remote nodes query in its local CNS for the tuple. The Local gatekeeper process at the requesting node receives results from a plurality of remote gatekeepers for the said tuple and selects one remote gatekeeper to receive the requested tuple and broadcasts a read for tuple data with selected gatekeeper.

Abstract: A system and method for notifying a process about a creation or removal event of a named data element (NDE) in a coordination namespace distributed memory system. A controller runs methods to: generate a tuple corresponding to data generated by a requesting process, the tuple having a tuple name and data value; and generate a notification indicator in a pending notification list to indicate to one or more processes a notification of the creation or removal event associated with the corresponding tuple. Upon detecting the event performed on the tuple by a second process, the method further searches for NDEs in the distributed memory system having the same tuple name, and in response to determining an existence of an associated pending notification record in a pending notification list of records, notify each corresponding process of the one or more processes indicated in the list of the creation or removal event.

Abstract: A system and method for supporting tuple record interlinking in one or more tuple space/coordinated namespace (CNS) extended memory storage systems. A system-wide CNS provides for efficient storing and communicating of data generated by local processes running at the nodes, and coordinated to generate a union/intersection of multiple CNS where tuple records are interlinked in multiple CNS hashtables, and/or share tuple data between two sets of processes that are part of different CNSs. Local node processes further generate multi-key tuples where two or more tuple records are interlinked within the same CNS hash table, thereby permitting a look up of the tuple data by either tuple name/keys. A CNS controller further provides a tuple iterator for a key-value storage in a CNS system that adds more links between tuples enables creation of iterator structures such as linked list or trees etc. of “different” tuples in a tuple database.

Abstract: A system and method of supporting point-to-point synchronization among processes/nodes implementing different hardware barriers in a tuple space/coordinated namespace (CNS) extended memory storage architecture. The system-wide CNS provides an efficient means for storing data, communications, and coordination within applications and workflows implementing barriers in a multi-tier, multi-nodal tree hierarchy. The system provides a hardware accelerated mechanism to support barriers between the participating processes. Also architected is a tree structure for a barrier processing method where processes are mapped to nodes of a tree, e.g., a tree of degree k to provide an efficient way of scaling the number of processes in a tuple space/coordination namespace.

Abstract: An activity box includes two pairs of wheels having blind holes, two axles having two ends releasably insertable into the blind holes, and a box defining a space having a defined volume sufficiently large to fit the axles. The wheels include a first magnetically attractable component. The axles include a second magnetically attractable component secured at each end of each axle. The axles have a length spanning a width of the box, which has two pairs of through holes on two opposing sides to accommodate the axles, such that the axles are threaded through the through holes. The two pairs of wheels are rotatably attached to the box by magnetically coupling the first magnetically attractable component to the second magnetically attractable component, such that the activity box is configured to be used as a cart that can be rolled over a surface.

Abstract: A system and method of buffered freepointer management to handle burst traffic to fixed size structures in an external memory system. A circular queue stores implicitly linked free memory locations, along with an explicitly linked list in memory. The queue is updated at the head with newly released locations, and new locations from memory are added at the tail. When a freed location in the queue is reused, external memory need not be updated. When the queue is full, the system attempts to release some of the freepointers such as by dropping them if they are already linked, updating the linked list in memory only if those dropped are not already linked. Latency can be further reduced by loading new locations from memory when the queue is nearly empty, rather than waiting for empty condition, and by writing unlinked locations to memory when the queue is nearly full.

Abstract: A system and method for supporting data MapReduce operations in a tuple space/coordinated namespace (CNS) extended memory storage architecture. The system-wide CNS provides an efficient means for storing and communicating data generated by local processes running at the nodes, and coordinated to provide MapReduce operations in a multi-nodal system. A hardware accelerated mechanism supports map reduce sorting/shuffle operations and reduce operations according to an aggregate function. Local processes running at a node generate a tuple corresponding to data generated by a process, each tuple having a tuple name and tuple data value corresponding to the generated data. Each tuple is processed and stored at the node or another node, dependent upon its tuple name. Tuple records associated with a tuple name are accumulated at one or more nodes according to a linked list structure at each that is accessible via a hash table index pointer at the node.

Abstract: A method of operating a memory controller performing activation of a memory device, the method including determining a selection signal for each tile column in a memory block of the memory device by activating respective local word lines, wherein the block selection signal is determined by performing a radix n operation on a vector identifying elements to be read or written.

Abstract: A system and method of supporting point-to-point synchronization among processes/nodes implementing different hardware barriers in a tuple space/coordinated namespace (CNS) extended memory storage architecture. The system-wide CNS provides an efficient means for storing data, communications, and coordination within applications and workflows implementing barriers in a multi-tier, multi-nodal tree hierarchy. The system provides a hardware accelerated mechanism to support barriers between the participating processes. Also architected is a tree structure for a barrier processing method where processes are mapped to nodes of a tree, e.g., a tree of degree k to provide an efficient way of scaling the number of processes in a tuple space/coordination namespace.

Abstract: Scatter gather operation(s) are performed by accessing a shared memory that is shared amongst nodes interconnected through network(s) and having a CNS shared amongst the nodes. Data is gathered from multiple processes at corresponding multiple nodes into location(s) in the CNS, and tuple(s) having a same tuple name are created in the CNS. The tuple(s) have information referencing the gathered data in the location(s). Alternatively, data that has been gathered using the same tuple name is scattered to multiple processes participating in the CNS. The scattering uses the tuple(s) in the CNS, and is performed from the location(s) into other location(s) at one or multiple nodes for one or multiple processes at the corresponding one or multiple nodes. Both the gathering data and the scattering data may also be performed.

Abstract: A computer implemented method and system for managing power in a 3D chip stack formed of multiple memory layers each having a plurality memory banks and a plurality of Through-Silicon-Vias (TSVs) connecting the memory banks. The TSVs are arranged in a plurality of subsets, each subset of TSVs connecting a corresponding vertical stack of memory banks aligned across a plurality of memory layers. The method includes determining a power delivery budget for each subset of TSVs connecting the corresponding vertical stack of memory banks based on memory requests, keeping track of memory requests to the memory banks of each vertical stack of memory banks and scheduling the memory requests to the memory banks of each vertical stack of memory banks based on the power budget. The memory controller is configured with a scorecard scheduler to manage the memory requests based on the power budget.

Abstract: A method of operating a memory controller performing activation of a memory device, the method including determining a selection signal for each tile column in a memory block of the memory device by activating respective local word lines, wherein the block selection signal is determined by performing a radix n operation on a vector identifying elements to be read or written.

Abstract: Devices in enterprise-scale networks are often tracked by asset catalogs that record the physical locations of respective devices. Such tracking often involves administratively heavy communication of device deployment, and communication or recording errors may lead to missing catalog entries or entries that incorrectly identify the physical locations of the devices. Instead, a MAC address encoding may be established that maps physical locations to particular MAC addresses, such as representing a building, floor, room, row, and rack of a device in the second through sixth MAC address octets. A locator device with a network adapter featuring a selected MAC address that encodes a particular physical address may be inserted into a network device at the physical location. The physical location of the network device may thereafter be queried for the MAC addresses of connected devices, and the selected MAC address may be translated into the physical location of the network device.

Abstract: The invention relates to a method to automatically predict a calving moment of a cow, comprising: recording, by a three-dimensional camera system, at least one three-dimensional image of the cow, processing, by a processing device, the at least one image of the cow, wherein processing of the image comprises determining a parameter indicative of the calving moment, and predicting a calving moment of the cow on the basis of the parameter.

Abstract: A computer implemented method and system for managing power in a 3D chip stack formed of multiple memory layers each having a plurality memory banks and a plurality of Through-Silicon-Vias (TSVs) connecting the memory banks. The TSVs are arranged in a plurality of subsets, each subset of TSVs connecting a corresponding vertical stack of memory banks aligned across a plurality of memory layers. The method includes determining a power delivery budget for each subset of TSVs connecting the corresponding vertical stack of memory banks based on memory requests, keeping track of memory requests to the memory banks of each vertical stack of memory banks and scheduling the memory requests to the memory banks of each vertical stack of memory banks based on the power budget. The memory controller is configured with a scorecard scheduler to manage the memory requests based on the power budget.

Abstract: A method and a device for determining the emission of greenhouse gas, in particular methane, by ruminants, in particular dairy animals includes counting eructations (“belches”) of the animal. This is done by measuring a signal linked to the eructations, for example sound with a microphone. Given that the methane content of an eructation of this type is more or less constant, the total methane emission can be derived therefrom by counting.