Abstract: A LPM search engine includes a plurality of exact match (EXM) engines and a moderately sized TCAM. Each EXM engine uses a prefix bitmap scheme that allows the EXM engine to cover multiple consecutive prefix lengths. Thus, instead of covering one prefix length L per EXM engine, the prefix bitmap scheme enables each EXM engine to cover entries having prefix lengths of L, L+1, L+2 and L+3, for example. As a result, fewer EXM engines are potentially underutilized, which effectively reduces quantization loss. Each EXM engine provides a search result with a determined fixed latency when using the prefix bitmap scheme. The results of multiple EXM engines and the moderately sized TCAM are combined to provide a single search result, representative of the longest prefix match. In one embodiment, the LPM search engine supports 32-bit IPv4 (or 128-bit IPv6) search keys, each having associated 15-bit level 3 VPN identification values.

Abstract: A LPM search engine includes a plurality of exact match (EXM) engines and a moderately sized TCAM. Each EXM engine uses a prefix bitmap scheme that allows the EXM engine to cover multiple consecutive prefix lengths. Thus, instead of covering one prefix length L per EXM engine, the prefix bitmap scheme enables each EXM engine to cover entries having prefix lengths of L, L+1, L+2 and L+3, for example. As a result, fewer EXM engines are potentially underutilized, which effectively reduces quantization loss. Each EXM engine provides a search result with a determined fixed latency when using the prefix bitmap scheme. The results of multiple EXM engines and the moderately sized TCAM are combined to provide a single search result, representative of the longest prefix match. In one embodiment, the LPM search engine supports 32-bit IPv4 (or 128-bit IPv6) search keys, each having associated 15-bit level 3 VPN identification values.

Abstract: A method and apparatus are provided for implementing communications in a communications network. The apparatus for implementing communications includes a system interface to the communications network. A scheduler schedules enqueued cells and enqueued frames to be transmitted. A segmenter segments frames and cells in into cells or frames applied to a media adaptation block for transmission in a selected one of multiple modes.

Abstract: A method and Gigabit Ethernet communications adapter are provided for implementing communications in a communications network. A transmission queue is defined of data to be transmitted. A transmission rate is set for the transmission queue. Data to be transmitted are enqueued on the transmission queue. The transmission queue can be subdivided into multiple priority queues, for example, using time wheels, and a transmission rate is set for each transmission queue.

Abstract: A method and apparatus are provided for scheduling the transmission of cells and frames in a communications network. The transmission of cells and frames are scheduled utilizing a selected scheduling algorithm. The cell/frame scheduling algorithm includes the step of identifying a frame or cell transmission type. Responsive to the identified frame or cell transmission type, a frame multiplier value is identified. A target transmission time is calculated for the frame or cell transmission type utilizing the identified frame multiplier value. A method and apparatus optionally are provided for scheduling the transmission of packet pairs.

Abstract: A communication cell scheduler and scheduling method are provided to efficiently provide periodic activities and predetermined events. A timer descriptor is enqueued to a cell scheduler timing wheel. A timer expiration for the timer descriptor is identified and an address for a DMA descriptor is fetched from the timer descriptor. Then the DMA descriptor is enqueued to a DMA engine to execute the DMA descriptor.

Abstract: A method and apparatus are provided for scheduling the transmission of cells of a plurality of data streams in a communications network. An earliest deadline first (EDF) scheduler is provided for scheduling the transmission of cells of a plurality of data streams in a communications network to ensure that the connection or data stream with the earliest deadline is transmitted first. Each of the multiple data streams has a delay bound or deadline. Data of each data stream is enqueued to a corresponding data cell queue. A timing wheel time slot based on an identified target transmission time for each data cell queue is calculated utilizing an addition of a maximum delay value. A move forward timing mechanism includes a scan forward feature to identify a succession of virtual connection or data stream cell queues for transmission. A multiple tier cell scheduler is provided that includes at least two scheduling timing wheels.

Abstract: A method and apparatus are provided for resource allocation with guarantees. A resource allocator is coupled to a controller. The resource allocator allocates resources between a plurality of arrival processes. A dedicated resource pool and a shared resource pool are provided. When an arrival process is identified, the resource allocator obtains a predefined characterizing value for the identified arrival process. Responsive to the obtained predefined characterizing value, resource from one of the dedicated resource pool or the shared resource pool is allocated to the arrival process. The controller is utilized for tracking resource use and for providing the predefined characterizing value for each of the plurality of arrival processes. The dedicated resource pool has a predetermined capacity greater than or equal to the total of all the low threshold values for each of the arrival processes.

Abstract: A method and apparatus are provided for processing data transmissions across data communications networks including ATM networks, for example, to support arbitrary user action on transmit completes. Sequential transport stream packets are obtained. A predetermined field of each transport stream packet is interrogated to identify a DMA on transmit complete. The transmission of a last cell in each transport stream packet is identified. Then responsive to identifying the DMA on transmit complete, an address for a DMA descriptor is fetched from the transport stream packet. The DMA descriptor is enqueued to a DMA engine to execute the DMA descriptor.

Abstract: A method and apparatus are provided for scheduling the transmission of cells of a plurality of data streams in a communications network. A best effort scheduler is provided for scheduling the transmission of cells of a plurality of data streams in a communications network. The best effort scheduler includes a best effort operational mode and can include more than one timing wheel. When the best effort scheduler includes more than one timing wheel, then the priority of the best effort timing wheel is lower than the priority of the other timing wheel or wheels. Data of each data stream is enqueued to a corresponding data cell queue. A target next transmission time for each data cell queue is calculated utilizing predetermined logical channel descriptor parameters. A lower priority or a higher priority timing wheel is selected and a timing wheel time slot is calculated based on an identified target transmission time for each active data cell queue.

Abstract: A method for setting a locking frequency operating range of the phase locked loop (PLL) circuit and a phase locked loop (PLL) circuit are provided with range select logic for detecting an unknown reference clock frequency and for setting a locking frequency operating range of the phase locked loop. First a bypass mode for the phase locked loop (PLL) circuit is set. An unknown reference clock frequency is applied to a first counter. A known oscillator clock frequency is applied to a second counter. The first and second counters are reset and a timeout value of the second counter is identified. A first counter count value is compared with precalculated constant values. A set of range bits are latched responsive to said compared values. Two consecutive sets of latched range bits are compared and the steps repeated until a match of two consecutive sets of latched range bits is identified. The matching latched range bits are applied to a programmable range select input of the phase locked loop (PLL) circuit.

Abstract: A method and apparatus for implementing virtual memory having multiple selected page sizes are provided. A virtual address includes a map index and a frame offset. A selector mechanism receives the virtual address frame offset and generates an offset and index. A frame map table indexes the virtual address map index and the selector generated index and generates a base address. The frame map table generated base address and the selector generated offset are combined to provide a physical address.

Abstract: Method and apparatus are provided for segmenting a multiple program multimedia digital data stream for transmission over a distribution communications network. Each program multimedia digital data stream includes sequential transport system (TS) packets with program clock references (PCRs) at a set time interval and a program identification (PID) associated with the PCRs. The multiple program multimedia digital data stream is received. The TS packets are decoded to identify the program clock references (PCRs). A selected number N of TS packets are identified. The multimedia digital data stream into frames responsive to both the identified number N of TS packets and the identified PCRs. A program identification (PID) associated with one of the PCRs is selected for timing the transmission of segmented multiple program multimedia digital data stream.