Abstract: A circuit arrangement comprising a plurality of electronic components; a plurality of first access lines and second access lines, wherein each electronic component is coupled with at least one first access line and second access lines, the second access lines comprising at least two bit-lines; an access controller controlling access to at least one of the electronic components via the at least one first access line and the second access lines; and a first group of switches, wherein each switch comprises at least one control terminal and at least two controlled terminals. Each switch of the first group is connected to one of the at least two bit-lines via its control terminal and in a path between one first access line and a sense amplifier via its controlled terminals, and adjacent switches are connected via their control terminals to different bit-lines of the at least two bit-lines.

Abstract: A circuit arrangement, having a plurality of electronic components; a plurality of first access lines and second access lines, wherein each electronic component is coupled with at least one first access line and at least one second access line; an access controller configured to control an access to at least one electronic component of the plurality of electronic components via the at least one first access line and the at least one second access line; a bias circuit configured to provide a defined potential to at least one of the first access lines, wherein the bias circuit is configured, during an access to an electronic component via one selected first access line of the plurality of first access lines, to provide the defined potential to one or two first access lines of the plurality of first access lines, wherein the one or two first access lines are arranged adjacent to the selected first access line, and, wherein during the access to the electronic component, the potentials of the first access lines of

Abstract: A circuit arrangement comprising a plurality of electronic components; a plurality of first access lines and second access lines, wherein each electronic component is coupled with at least one first access line and second access lines, the second access lines comprising at least two bit-lines; an access controller controlling access to at least one of the electronic components via the at least one first access line and the second access lines; and a first group of switches, wherein each switch comprises at least one control terminal and at least two controlled terminals. Each switch of the first group is connected to one of the at least two bit-lines via its control terminal and in a path between one first access line and a sense amplifier via its controlled terminals, and adjacent switches are connected via their control terminals to different bit-lines of the at least two bit-lines.

Abstract: A circuit arrangement, having a plurality of electronic components; a plurality of first access lines and second access lines, wherein each electronic component is coupled with at least one first access line and at least one second access line; an access controller configured to control an access to at least one electronic component of the plurality of electronic components via the at least one first access line and the at least one second access line; a bias circuit configured to provide a defined potential to at least one of the first access lines, wherein the bias circuit is configured, during an access to an electronic component via one selected first access line of the plurality of first access lines, to provide the defined potential to one or two first access lines of the plurality of first access lines, wherein the one or two first access lines are arranged adjacent to the selected first access line, and, wherein during the access to the electronic component, the potentials of the first access lines of