Abstract: A MOS transistor and subsurface collectors can be formed by using a hard mask and precisely varying the implant angle, rotation, dose, and energy. In this case, a particular atomic species can be placed volumetrically in a required location under the hard mask. The dopant can be implanted to form sub-silicon volumes of arbitrary shapes, such as pipes, volumes, hemispheres, and interconnects.

Abstract: In a MOS array, current loss at distances further away from the drain and source contacts is compensated for by adjusting the length of the polygate. In an array with drain and source contacts near the middle of the structure, the length of the polygate tapers off along the width of the polygate towards both ends of the polygate.

Abstract: A multiple-layer diffusion junction capacitor structure includes multiple layers of inter-digitated P-type dopant and N-type dopant formed in a semiconductor substrate. An opening in a hard mask is formed taking care to control the angle of the sidewall using a dry, anisotropic etching process. P-type and N-type dopant are then implanted at positive and negative shallow angles, respectively, each with a different energy and dose. By utilizing the properly determined implant angles, implant energies and implant doses for each of the dopant types, a high capacitance and high density diode junction capacitor, with inter-digitated N-type and P-type regions in the vertical direction is provided.

Abstract: Fluorine is implanted directly into the channel region of a PMOS transistor structure, thereby improving the noise and VT drift margin of device performance by introducing Si—F complexes at the substrate-gate oxide interface.

Abstract: The present invention is directed to a photogate based pixel cell with an electronic shutter and which provides relatively low lag and high sensitivity for sensing infrared light reflected from objects. Additionally, this invention eliminates the need for a transfer gate in the pixel cell. In one embodiment, the reset and shutter transistors are implemented with PMOS transistors so that the pixel cell can have an increased dynamic range and a relatively high voltage swing. In another embodiment, the actual size of each pixel cell can be further reduced when the reset gate and the electronic shutter are implemented with NMOS transistors. Also, when a P− well is not disposed beneath the photogate, the ability of the pixel cell to sense infrared light is improved. Correlated double sampling can be used to improve the accuracy of the signal read out from the pixel cell.

Abstract: In a semiconductor structure, interconnects between regions of a single device or different devices are achieved by forming metal plugs that span across the regions to be interconnected, wherein the plugs are formed from the metal used in forming a silicide layer on the structure. The metal is masked off in desired areas prior to etching, to leave the metal plugs.

Abstract: A conductive trace is formed over and insulated from a region of semiconductor material, such as a region adjacent to the n+ region of an n+/p− photodiode, and a sawtooth current is made to flow through the conductive trace. The sawtooth current induces charge carriers to move through the semiconductor material to a collection region in the semiconductor material.

Abstract: A combination of materials is used to form the photodiodes of a vertical color imager cell. The materials used to form the photodiodes have different band gaps that allow the photon absorption rates of the photodiodes to be adjusted. By adjusting the photon absorption rates, the sensitivities of the photodiodes and thereby the characteristics of the imager can be adjusted.

Abstract: A capacitor structure is formed in a wedge-shaped trench by forming alternating layers of insulating material and conductive material in the trench such that each layer of conductive material formed in the trench is electrically isolated from adjacent layers of conductive material formed in the trench. A first electrical contact is formed to electrically link in parallel a first set of alternating layers of conductive material. A second electrical contact is formed to electrically link in parallel a second set of alternating layers of conductive material. The two electrically isolated sets of inter-linked layers of conductive material define the interdigitated capacitor structure.

Abstract: A vertical photodetector for detecting different wavelengths of light. The structure provides doped regions, which are separated by barrier regions. The doped regions detect photons corresponding to different wavelengths of light. Specifically, by detecting the amount of electrical charge collected by diodes positioned in the different doped regions, different wavelengths of light can be detected. The barrier regions inhibit the flow of electrical charges from one doped region into another doped region. The area of the doped regions can be increased, without increasing the capacitance of the diodes which are used to detect the electrical charges generated by light incident of the vertical photodetector.