Patents by Inventor Phillip G. Wald
Phillip G. Wald has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 7366946Abstract: Redundancy in a read only memory (ROM) embedded dynamic random access memory (DRAM) is accomplished by programming redundancy elements such as antifuses or registers with ROM data which is read instead of erroneous data. Multiple identical arrays of ROM bits can also be used for redundancy.Type: GrantFiled: February 6, 2007Date of Patent: April 29, 2008Assignee: Micron Technology, Inc.Inventors: Scott Derner, Casey Kurth, Phillip G. Wald
-
Patent number: 7218547Abstract: A ROM embedded DRAM provides ROM cells that can be electrically programmed to a data state using DRAM capacitor memory cells. Numerous techniques for reading the memory cells are provided if a single state memory is desired. For example, bias techniques allow un-programmed ROM cells to be read accurately. In one embodiment, the memory includes program circuitry to short capacitor plates together by breaking down an intermediate dielectric layer using anti-fuse programming techniques.Type: GrantFiled: May 11, 2004Date of Patent: May 15, 2007Assignee: Micron Technology, Inc.Inventors: Casey Kurth, Scott Derner, Phillip G. Wald
-
Patent number: 7174477Abstract: Redundancy in a read only memory (ROM) embedded dynamic random access memory (DRAM) is accomplished by programming redundancy elements such as antifuses or registers with ROM data which is read instead of erroneous data. Multiple identical arrays of ROM bits can also be used for redundancy.Type: GrantFiled: February 4, 2003Date of Patent: February 6, 2007Assignee: Micron Technology, Inc.Inventors: Scott Derner, Casey Kurth, Phillip G. Wald
-
Patent number: 7099212Abstract: A ROM embedded DRAM provides ROM cells that can be programmed to a single state. The ROM cells include capacitors having a storage node. The storage node is processed to have a substantially high substrate leakage. The ROM cells, therefore, are hard programmed to a logic zero state. Bias techniques can be used to read un-programmed ROM cells accurately. As described, sense amplifier circuitry can be offset in one embodiment to default to the un-programmed state. In another embodiment, bias circuitry is coupled to bit lines to favor the un-programmed state. A differential pre-charge operation can also be used in another embodiment.Type: GrantFiled: August 23, 2004Date of Patent: August 29, 2006Assignee: Micron Technology, Inc.Inventors: Casey Kurth, Scott Derner, Phillip G. Wald
-
Patent number: 7012006Abstract: A ROM embedded DRAM provides ROM cells that can be programmed to a single state. The ROM cells include capacitors having a storage node. The storage node is processed to have a substantially high substrate leakage. The ROM cells, therefore, are hard programmed to a logic zero state. Bias techniques can be used to read un-programmed ROM cells accurately. As described, sense amplifier circuitry can be offset in one embodiment to default to the un-programmed state. In another embodiment, bias circuitry is coupled to bit lines to favor the un-programmed state. A differential pre-charge operation can also be used in another embodiment.Type: GrantFiled: August 23, 2004Date of Patent: March 14, 2006Assignee: Micron Technology, Inc.Inventors: Casey Kurth, Scott Derner, Phillip G. Wald
-
Patent number: 7001816Abstract: A ROM embedded DRAM provides ROM cells that can be programmed to a single state. The ROM cells include capacitors having a storage node. The storage node is processed to have a substantially high substrate leakage. The ROM cells, therefore, are hard programmed to a logic zero state. Bias techniques can be used to read un-programmed ROM cells accurately. As described, sense amplifier circuitry can be offset in one embodiment to default to the un-programmed state. In another embodiment, bias circuitry is coupled to bit lines to favor the un-programmed state. A differential pre-charge operation can also be used in another embodiment.Type: GrantFiled: August 24, 2004Date of Patent: February 21, 2006Assignee: Micron Technology, Inc.Inventors: Casey Kurth, Scott Derner, Phillip G. Wald
-
Patent number: 6996021Abstract: A ROM embedded DRAM that provides ROM cells that can be programmed to a single state. Bias techniques are used to read un-programmed ROM cells accurately. Sense amplifier circuitry can be offset in one embodiment to default to the un-programmed state. In another embodiment, bias circuitry is coupled to bit lines to favor the un-programmed state. Further, a differential pre-charge operation can also be used in another embodiment. The ROM embedded DRAM allows for simplifier fabrication and programming of the ROM cells, while providing accurate dual state functionality.Type: GrantFiled: July 27, 2004Date of Patent: February 7, 2006Assignee: Micron Technology, Inc.Inventors: Scott Derner, Casey Kurth, Phillip G. Wald
-
Patent number: 6903957Abstract: A half-density ROM embedded DRAM uses hard programmed non-volatile cells and unprogrammed dynamic cells. By hard programming either a first or second memory cell in a pair of cell, different data states are stored. Two word lines are used to access the memory cell pair. Because one of the cells is hard programmed, sense amplifier circuitry identifies the appropriate data state. The ROM cell can be programmed in numerous different manners. For example, ROM cells can be hard programmed by eliminating cell dielectric to short cell plates to a program voltage, or an electrical plug can be fabricated between the cell plates and shorted to a program voltage. In other embodiments, the ROM cell can be programmed using an anti-fuse programming technique, or by providing a high leakage path (not full short) such as through an active area to the substrate.Type: GrantFiled: June 8, 2004Date of Patent: June 7, 2005Assignee: Micron Technology, Inc.Inventors: Scott Derner, Casey Kurth, Phillip G. Wald
-
Patent number: 6865130Abstract: A ROM embedded DRAM that provides ROM cells that can be programmed to a single state. Bias techniques are used to read un-programmed ROM cells accurately. Sense amplifier circuitry can be offset in one embodiment to default to the un-programmed state. In another embodiment, bias circuitry is coupled to bit lines to favor the un-programmed state. Further, a differential pre-charge operation can also be used in another embodiment. The ROM embedded DRAM allows for simplifier fabrication and programming of the ROM cells, while providing accurate dual state functionality.Type: GrantFiled: February 28, 2003Date of Patent: March 8, 2005Assignee: Micron Technology, Inc.Inventors: Scott Derner, Casey Kurth, Phillip G. Wald
-
Patent number: 6865100Abstract: A read only memory (ROM) embedded dynamic random access memory (DRAM) has a 6F2 architecture and uses isolation gates as hard shorting connections for ground or supply voltage connections to program ROM bits within the ROM embedded DRAM.Type: GrantFiled: August 12, 2002Date of Patent: March 8, 2005Assignee: Micron Technology, Inc.Inventors: Phillip G. Wald, Casey Kurth, Scott Derner
-
Patent number: 6852611Abstract: A ROM embedded DRAM allows hard programming of ROM cells by shorting DRAM capacitor plates during fabrication. In one embodiment, the intermediate dielectric layer is removed and the plates are shorted with a conductor. In another embodiment, an upper conductor and dielectric are removed and a conductor is fabricated in contact with the DRAM storage plate. The memory allows ROM cells to be hard programmed to different data states, such as Vcc and Vss.Type: GrantFiled: July 31, 2003Date of Patent: February 8, 2005Assignee: Micron Technology, Inc.Inventors: Phillip G. Wald, Casey Kurth, Scott Derner
-
Publication number: 20040264258Abstract: A ROM embedded DRAM that provides ROM cells that can be programmed to a single state. Bias techniques are used to read un-programmed ROM cells accurately. Sense amplifier circuitry can be offset in one embodiment to default to the un-programmed state. In another embodiment, bias circuitry is coupled to bit lines to favor the un-programmed state. Further, a differential pre-charge operation can also be used in another embodiment. The ROM embedded DRAM allows for simplifier fabrication and programming of the ROM cells, while providing accurate dual state functionality.Type: ApplicationFiled: July 27, 2004Publication date: December 30, 2004Applicant: Micron Technology, Inc.Inventors: Scott Derner, Casey Kurth, Phillip G. Wald
-
Patent number: 6825095Abstract: The invention includes a number of methods and structures pertaining to semiconductor circuit technology, including: methods of forming DRAM memory cell constructions; methods of forming capacitor constructions; DRAM memory cell constructions; capacitor constructions; and monolithic integrated circuitry. The invention includes a method of forming a capacitor comprising the following steps: a) forming a mass of silicon material over a node location, the mass comprising exposed doped silicon and exposed undoped silicon; b) substantially selectively forming rugged polysilicon from the exposed undoped silicon and not from the exposed doped silicon; and c) forming a capacitor dielectric layer and a complementary capacitor plate proximate the rugged polysilicon and doped silicon.Type: GrantFiled: September 18, 2001Date of Patent: November 30, 2004Assignee: Micron Technology, Inc.Inventors: Kunal R. Parekh, John K. Zahurak, Phillip G. Wald
-
Publication number: 20040233741Abstract: A half-density ROM embedded DRAM uses hard programmed non-volatile cells and unprogrammed dynamic cells. By hard programming either a first or second memory cell in a pair of cell, different data states are stored. Two word lines are used to access the memory cell pair. Because one of the cells is hard programmed, sense amplifier circuitry identifies the appropriate data state. The ROM cell can be programmed in numerous different manners. For example, ROM cells can be hard programmed by eliminating cell dielectric to short cell plates to a program voltage, or an electrical plug can be fabricated between the cell plates and shorted to a program voltage. In other embodiments, the ROM cell can be programmed using an anti-fuse programming technique, or by providing a high leakage path (not full short) such as through an active area to the substrate.Type: ApplicationFiled: June 8, 2004Publication date: November 25, 2004Applicant: Micron Technology, Inc.Inventors: Scott Derner, Casey Kurth, Phillip G. Wald
-
Publication number: 20040208050Abstract: A ROM embedded DRAM provides ROM cells that can be electrically programmed to a data state using DRAM capacitor memory cells. Numerous techniques for reading the memory cells are provided if a single state memory is desired. For example, bias techniques allow un-programmed ROM cells to be read accurately. In one embodiment, the memory includes program circuitry to short capacitor plates together by breaking down an intermediate dielectric layer using anti-fuse programming techniques.Type: ApplicationFiled: May 11, 2004Publication date: October 21, 2004Applicant: Micron Technology, Inc.Inventors: Casey Kurth, Scott Derner, Phillip G. Wald
-
Patent number: 6788603Abstract: A ROM embedded DRAM that provides ROM cells that can be programmed to a single state. Bias techniques are used to read un-programmed ROM cells accurately. Sense amplifier circuitry can be offset in one embodiment to default to the un-programmed state. In another embodiment, bias circuitry is coupled to bit lines to favor the un-programmed state. Further, a differential pre-charge operation can also be used in another embodiment. The ROM embedded DRAM allows for simplifier fabrication and programming of the ROM cells, while providing accurate dual state functionality.Type: GrantFiled: February 28, 2003Date of Patent: September 7, 2004Assignee: Micron Technology, Inc.Inventors: Scott Derner, Casey Kurth, Phillip G. Wald
-
Patent number: 6785167Abstract: Programming efficiency of a read only memory (ROM) embedded dynamic random access memory (DRAM) is improved by programming only one polarity of bits in non-volatile cells of the ROM embedded DRAM, and then blanket programming volatile cells in the ROM embedded DRAM to represent the remaining bits.Type: GrantFiled: June 18, 2002Date of Patent: August 31, 2004Assignee: Micron Technology, Inc.Inventors: Casey Kurth, Scott Derner, Phillip G. Wald
-
Patent number: 6781867Abstract: A ROM embedded DRAM provides ROM cells that can be programmed to a single state. The ROM cells include capacitors having a storage node. The storage node is processed to have a substantially high substrate leakage. The ROM cells, therefore, are hard programmed to a logic zero state. Bias techniques can be used to read un-programmed ROM cells accurately. As described, sense amplifier circuitry can be offset in one embodiment to default to the un-programmed state. In another embodiment, bias circuitry is coupled to bit lines to favor the un-programmed state. A differential pre-charge operation can also be used in another embodiment.Type: GrantFiled: July 11, 2002Date of Patent: August 24, 2004Assignee: Micron Technology, Inc.Inventors: Casey Kurth, Scott Derner, Phillip G. Wald
-
Publication number: 20040153725Abstract: Redundancy in a read only memory (ROM) embedded dynamic random access memory (DRAM) is accomplished by programming redundancy elements such as antifuses or registers with ROM data which is read instead of erroneous data. Multiple identical arrays of ROM bits can also be used for redundancy.Type: ApplicationFiled: February 4, 2003Publication date: August 5, 2004Applicant: Micron Technology, Inc.Inventors: Scott Derner, Casey Kurth, Phillip G. Wald
-
Patent number: 6771529Abstract: A ROM embedded DRAM that provides ROM cells that can be programmed to a single state. Bias techniques are used to read un-programmed ROM cells accurately. Sense amplifier circuitry can be offset in one embodiment to default to the un-programmed state. In another embodiment, bias circuitry is coupled to bit lines to favor the un-programmed state. Further, a differential pre-charge operation can also be used in another embodiment. The ROM embedded DRAM allows for simplifier fabrication and programming of the ROM cells, while providing accurate dual state functionality.Type: GrantFiled: February 28, 2003Date of Patent: August 3, 2004Assignee: Micron Technology, Inc.Inventors: Scott Derner, Casey Kurth, Phillip G. Wald