Patents by Inventor Phillip Jacobsen

Phillip Jacobsen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130272167
    Abstract: In a system providing for delivery of audio signals from one or more source audio systems to two or more audio output sink systems, the sink systems establish duplex communication links (or bonds) to a bonding subsystem which is in duplex communication with the source audio systems. Data signals may be sent from sink systems, via the bonding subsystem, to request delivery of audio signals from selected audio source channels. The sink systems may request specific treatments of or modifications to audio signals to be sent to individual sinks in the sink systems. The bonding subsystem relays treatment requests from the sink system to a matrix manager which initiates and controls the processing of source audio channels as required to comply with requests from the sink system. The matrix manager then delivers the treated or modified audio output channels to the bonding subsystem for delivery to the requesting sink systems.
    Type: Application
    Filed: June 12, 2013
    Publication date: October 17, 2013
    Inventors: John SOBOTA, Phillip JACOBSEN
  • Patent number: 8050203
    Abstract: In a multi-channel digital wireless audio system with at least one transmit node and at least one receive node, each node can both receive and transmit digital audio signals. Signals sent from a receive node to a transmit node may acknowledge satisfactory signal receipt, or may requesting retransmission of data packets received in a corrupted state. Original and retransmitted signals may be sent in compressed form to enable use of narrow-band digital radios. The system preferably incorporates a dual control channel to enable transmission of meta data. Each system node preferably incorporates a hardware-multithreaded processor adapted to implement various functions such as baseband functions, RF protocol functions, error correction functions, and audio processing functions, with each independent thread being adapted to implement a different functional block.
    Type: Grant
    Filed: December 20, 2005
    Date of Patent: November 1, 2011
    Inventors: Phillip Jacobsen, John Sobota, Ryan Northcott, Jim Qualie, Patrick Fisher, Jason Gosior
  • Publication number: 20100284543
    Abstract: In a system providing for delivery of audio signals from one or more source audio systems to two or more audio output sink systems, the sink systems establish duplex communication links (or bonds) to a bonding subsystem, which in turn is in duplex communication with the source audio systems. Data signals may be sent from sink systems, via the bonding subsystem, to request delivery of audio signals from selected audio source channels. In preferred embodiments, the sink systems may also request specific treatments of or modifications to audio signals to be sent to individual sinks in the sink systems. The bonding subsystem receives such treatment requests from the sink system and relays them to a matrix manager which initiates and controls the processing of source audio channels as required to comply with requests from the sink system. The matrix manager then delivers the treated or modified audio output channels to the bonding subsystem for delivery to the requesting sink systems.
    Type: Application
    Filed: January 5, 2009
    Publication date: November 11, 2010
    Inventors: John Sobota, Phillip Jacobsen
  • Patent number: 7320065
    Abstract: An embedded processor system having a single-chip embedded microprocessor with analog and digital electrical interfaces to external systems. A novel processor core uses pipelined execution of multiple independent or dependent concurrent threads, together with supervisory control for monitoring and controlling the processor thread state and access to other components. The pipeline enables simultaneous execution of multiple threads by selectively avoiding memory or peripheral access conflicts through the types of pipeline stages chosen and the use of dual and tri-port memory techniques. The single processor core executes one or multiple instruction streams on multiple data streams in various combinations under the control of single or multiple threads.
    Type: Grant
    Filed: April 26, 2001
    Date of Patent: January 15, 2008
    Assignee: Eleven Engineering Incorporated
    Inventors: Jason Gosior, Colin Broughton, Phillip Jacobsen, John Sobota
  • Publication number: 20060153155
    Abstract: In a multi-channel digital wireless audio system with at least one transmit node and at least one receive node, each node can both receive and transmit digital audio signals. Signals sent from a receive node to a transmit node may acknowledge satisfactory signal receipt, or may requesting retransmission of data packets received in a corrupted state. Original and retransmitted signals may be sent in compressed form to enable use of narrow-band digital radios. The system preferably incorporates a dual control channel to enable transmission of meta data. Each system node preferably incorporates a hardware-multithreaded processor adapted to implement various functions such as baseband functions, RF protocol functions, error correction functions, and audio processing functions, with each independent thread being adapted to implement a different functional block.
    Type: Application
    Filed: December 20, 2005
    Publication date: July 13, 2006
    Inventors: Phillip Jacobsen, John Sobota, Ryan Northcott, Jim Qualie, Patrick Fisher, Jason Gosior
  • Publication number: 20030120896
    Abstract: An embedded processor system having a single-chip embedded microprocessor, with analog and digital electrical interfaces to external systems, that is suitable for implementation in various integrated circuit technology formats. A processor core uses pipelined execution of multiple independent or dependent concurrent threads, together with supervisory control for monitoring and controlling the processor thread state and access to other components. The pipeline enables simultaneous execution of multiple threads by selectively avoiding memory or peripheral access conflicts through the types of pipeline stages chosen and the use of dual and tri-port memory techniques. The single processor core executes one or multiple instruction streams on multiple data streams in various combinations under the control of single or multiple threads. The invention can also support a programmable clock mechanism, thread-level monitoring capability, and power management capability.
    Type: Application
    Filed: June 29, 2001
    Publication date: June 26, 2003
    Inventors: Jason Gosior, Colin Broughton, Phillip Jacobsen, John Sobota
  • Publication number: 20030093655
    Abstract: An embedded processor system having a single-chip embedded microprocessor with analog and digital electrical interfaces to external systems. A novel processor core uses pipelined execution of multiple independent or dependent concurrent threads, together with supervisory control for monitoring and controlling the processor thread state and access to other components. The pipeline enables simultaneous execution of multiple threads by selectively avoiding memory or peripheral access conflicts through the types of pipeline stages chosen and the use of dual and tri-port memory techniques. The single processor core executes one or multiple instruction streams on multiple data streams in various combinations under the control of single or multiple threads.
    Type: Application
    Filed: April 26, 2001
    Publication date: May 15, 2003
    Applicant: Eleven Engineering Inc.
    Inventors: Jason Gosior, Colin Broughton, Phillip Jacobsen, John Sobota