Patents by Inventor Phuong Rosalynn Duong

Phuong Rosalynn Duong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Optimizing application specific integrated circuit pinouts for high density interconnect printed circuit boards
    Patent number: 8990754
    Abstract: Techniques for optimizing application specific integrated circuit (ASIC) and other IC pin assignment corresponding to a high density interconnect (HDI) printed circuit board (PCB) layout are provided. Applying the techniques described herein, pin assignments may be systematically and strategically planned, for example, in an effort to reduce the PCB layer count and associated cost, increase signal integrity and speed, reduce the surface area used by an ASIC and its support circuitry, reduce plane perforations, and reduce via crosstalk when compared to conventional designs with an ASIC mounted on a multilayered PCB.
    Type: Grant
    Filed: July 12, 2010
    Date of Patent: March 24, 2015
    Assignee: Cisco Technology, Inc.
    Inventors: Steven C. Bird, Linda M. Mazaheri, Bob Needham, Phuong Rosalynn Duong
  • Optimizing ASIC pinouts for HDI
    Patent number: 8344266
    Abstract: Techniques for optimizing application specific integrated circuit (ASIC) and other IC pin assignment corresponding to a high density interconnect (HDI) printed circuit board (PCB) layout are provided. Applying the techniques described herein, pin assignments may be systematically and strategically planned, for example, in an effort to reduce the PCB layer count and associated cost, increase signal integrity and speed, reduce the surface area used by an ASIC and its support circuitry, reduce plane perforations, and reduce via crosstalk when compared to conventional designs with an ASIC mounted on a multilayered PCB.
    Type: Grant
    Filed: August 10, 2007
    Date of Patent: January 1, 2013
    Assignee: Cisco Technology, Inc.
    Inventors: Steven C. Bird, Linda M. Mazaheri, Bob Needham, Phuong Rosalynn Duong
  • Connection an integrated circuit on a surface layer of a printed circuit board
    Patent number: 7979983
    Abstract: Techniques for optimizing application specific integrated circuit (ASIC) and other IC pin assignment corresponding to a high density interconnect (HDI) printed circuit board (PCB) layout are provided. Applying the techniques described herein, pin assignments may be systematically and strategically planned, for example, in an effort to reduce the PCB layer count and associated cost, increase signal integrity and speed, reduce the surface area used by an ASIC and its support circuitry, reduce plane perforations, and reduce via crosstalk when compared to conventional designs with an ASIC mounted on a multilayered PCB.
    Type: Grant
    Filed: April 4, 2007
    Date of Patent: July 19, 2011
    Assignee: Cisco Technology, Inc.
    Inventors: Steven C. Bird, Linda M. Mazaheri, Bob Needham, Phuong Rosalynn Duong
  • OPTIMIZING APPLICATION SPECIFIC INTEGRATED CIRCUIT PINOUTS FOR HIGH DENSITY INTERCONNECT PRINTED CIRCUIT BOARDS
    Publication number: 20100270681
    Abstract: Techniques for optimizing application specific integrated circuit (ASIC) and other IC pin assignment corresponding to a high density interconnect (HDI) printed circuit board (PCB) layout are provided. Applying the techniques described herein, pin assignments may be systematically and strategically planned, for example, in an effort to reduce the PCB layer count and associated cost, increase signal integrity and speed, reduce the surface area used by an ASIC and its support circuitry, reduce plane perforations, and reduce via crosstalk when compared to conventional designs with an ASIC mounted on a multilayered PCB.
    Type: Application
    Filed: July 12, 2010
    Publication date: October 28, 2010
    Inventors: Steven C. Bird, Linda M. Mazaheri, Bob Needham, Phuong Rosalynn Duong
  • Optimizing application specific integrated circuit pinouts for high density interconnect printed circuit boards
    Patent number: 7757196
    Abstract: Techniques for optimizing application specific integrated circuit (ASIC) and other IC pin assignment corresponding to a high density interconnect (HDI) printed circuit board (PCB) layout are provided. Applying the techniques described herein, pin assignments may be systematically and strategically planned, for example, in an effort to reduce the PCB layer count and associated cost, increase signal integrity and speed, reduce the surface area used by an ASIC and its support circuitry, reduce plane perforations, and reduce via crosstalk when compared to conventional designs with an ASIC mounted on a multilayered PCB.
    Type: Grant
    Filed: April 4, 2007
    Date of Patent: July 13, 2010
    Assignee: Cisco Technology, Inc.
    Inventors: Steven C. Bird, Linda M. Mazaheri, Bob Needham, Phuong Rosalynn Duong
  • OPTIMIZING ASIC PINOUTS FOR HDI
    Publication number: 20080250373
    Abstract: Techniques for optimizing application specific integrated circuit (ASIC) and other IC pin assignment corresponding to a high density interconnect (HDI) printed circuit board (PCB) layout are provided. Applying the techniques described herein, pin assignments may be systematically and strategically planned, for example, in an effort to reduce the PCB layer count and associated cost, increase signal integrity and speed, reduce the surface area used by an ASIC and its support circuitry, reduce plane perforations, and reduce via crosstalk when compared to conventional designs with an ASIC mounted on a multilayered PCB.
    Type: Application
    Filed: April 4, 2007
    Publication date: October 9, 2008
    Inventors: STEVEN C. BIRD, Linda M. Mazaheri, Bob Needham, Phuong Rosalynn Duong
  • OPTIMIZING ASIC PINOUTS FOR HDI
    Publication number: 20080245557
    Abstract: Techniques for optimizing application specific integrated circuit (ASIC) and other IC pin assignment corresponding to a high density interconnect (HDI) printed circuit board (PCB) layout are provided. Applying the techniques described herein, pin assignments may be systematically and strategically planned, for example, in an effort to reduce the PCB layer count and associated cost, increase signal integrity and speed, reduce the surface area used by an ASIC and its support circuitry, reduce plane perforations, and reduce via crosstalk when compared to conventional designs with an ASIC mounted on a multilayered PCB.
    Type: Application
    Filed: August 10, 2007
    Publication date: October 9, 2008
    Inventors: Steven C. Bird, Linda M. Mazaheri, Bob Needham, Phuong Rosalynn Duong
  • OPTIMIZING THE PCB LAYOUT ESCAPE FROM AN ASIC USING HDI
    Publication number: 20080245556
    Abstract: Techniques for optimizing application specific integrated circuit (ASIC) and other IC pin assignment corresponding to a high density interconnect (HDI) printed circuit board (PCB) layout are provided. Applying the techniques described herein, pin assignments may be systematically and strategically planned, for example, in an effort to reduce the PCB layer count and associated cost, increase signal integrity and speed, reduce the surface area used by an ASIC and its support circuitry, reduce plane perforations, and reduce via crosstalk when compared to conventional designs with an ASIC mounted on a multilayered PCB.
    Type: Application
    Filed: April 4, 2007
    Publication date: October 9, 2008
    Inventors: STEVEN C. BIRD, Linda M. Mazaheri, Bob Needham, Phuong Rosalynn Duong