Patents by Inventor Pi-Yuan Shih

Pi-Yuan Shih has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090158300
    Abstract: For use in a dual-path network system comprising a master end, a main transmission path, a sub-transmission path, an intermediary device, and a slave end, a network redundancy check application program management method is disclosed to virtualize COM ports of multiple IP addresses in the master end into one single virtualized COM port by means of a driver in the master end so that the user/user's application program needs only to manage/monitor the virtualized COM port. Through the driver and the firmware formed in the intermediary device, the invention covers all operation modes, and the user/user's application program needs not to worry about system complication resulted from the redundancy check system. Under the network architecture of the present invention, the master end enjoys the high stability of dual-path, and the manager needs not to manage a big number of COM ports.
    Type: Application
    Filed: December 13, 2007
    Publication date: June 18, 2009
    Applicant: MOXA TECHNOLOGIES CO., LTD.
    Inventors: Pi-Yuan Shih, Jer-Hong Suen, Shih-Hui Shao
  • Patent number: 7549094
    Abstract: The present invention discloses a method for receiving data by a universal asynchronous receiver transmitter, which includes a receive shift register (RSR), a receiver FIFO, a receiver buffer register (RBR), a line status register (LSR), and a good data length register (GDL). The RSR is connected to the receiver FIFO and the LSR in parallel. The receiver FIFO is further connected to the RBR, and the LSR is connected to the GDL. The receiver buffer register, the good data length register, and the line status register are connected to a microprocessor through a bus, such that when the receive shift register receives a plurality of serial data, the good data length register counts the number of correct data, and the microprocessor uses the count of the good data length register as a number of times for reading the receiver buffer register thereby enhance the performance of reading data.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: June 16, 2009
    Assignee: Moxa Technologies Co., Ltd.
    Inventor: Pi-Yuan Shih
  • Publication number: 20080084947
    Abstract: The present invention discloses a method for receiving data by a universal asynchronous receiver transmitter, which includes a receive shift register, a receiver FIFO, receiver buffer, a line status register, and a good data length register (GDL). The receive shift register is connected to the receiver FIFO and the line status register in parallel. Afterward the receiver FIFO is connected to a receiver buffer, and the line status register is connected to a good data length register (GDL).
    Type: Application
    Filed: November 30, 2007
    Publication date: April 10, 2008
    Applicant: MOXA TECHNOLOGIES CO., LTD.
    Inventor: Pi-Yuan Shih
  • Publication number: 20060155879
    Abstract: The present invention discloses a method for receiving data by a universal asynchronous receiver transmitter and the universal asynchronous receiver transmitter includes a receive shift register and a counter, and the receive shift register is connected to a receive register, and the receive register is connected to a preinstalled microprocessor through a bus, such that when the receive shift register receives a plurality of serial data, the counter counts the correct data marked by an error bit, and the microprocessor bases on the count of the counter as the number of times for reading data addresses to read all data marked as a correct data and enhances the performance of reading data.
    Type: Application
    Filed: January 9, 2005
    Publication date: July 13, 2006
    Applicant: MOXA TECHNOLOGIES CO., LTD.
    Inventor: Pi-Yuan Shih