Patents by Inventor Pil-Kyu Kang

Pil-Kyu Kang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120314993
    Abstract: Optical input/output (I/O) devices, which include a substrate including a trench, a waveguide within the trench of the substrate; and a photodetector within the trench and optically connected to the waveguide. An upper surface of the photodetector is at a same level as an upper surface of the waveguide.
    Type: Application
    Filed: June 12, 2012
    Publication date: December 13, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Pil-Kyu Kang, Dae-Lok Bae, Byung-Lyul Park, Gil-Heyun Choi
  • Publication number: 20120314991
    Abstract: Semiconductor devices having an optical transceiver include a cladding on a substrate, a protrusion vertically extending trough the cladding and materially in continuity with the substrate, and a coupler on the cladding and the protrusion.
    Type: Application
    Filed: March 5, 2012
    Publication date: December 13, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Pil-Kyu Kang, Dae-Lok Bae, Byung-Lyul Park, Gil-Heyun Choi
  • Patent number: 8324055
    Abstract: A method of manufacturing a buried wiring type substrate comprises implanting hydrogen ions into a single crystalline substrate through a first surface thereof to form an ion implantation region, forming a conductive layer comprising a metal on the first surface of the single crystalline substrate, forming an insulation layer comprising silicon oxide on the conductive layer, bonding the insulation layer to a support substrate to form a preliminary buried wiring type substrate, and separating the single crystalline substrate at the ion implantation region to form a single crystalline semiconductor layer on the conductive layer.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: December 4, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Pil-Kyu Kang, Dae-Lok Bae, Gil-Heyun Choi, Jong-Myeong Lee
  • Patent number: 8319329
    Abstract: Microelectronic packages are fabricated by stacking integrated circuits upon one another. Each integrated circuit includes a semiconductor layer having microelectronic devices and a wiring layer on the semiconductor layer having wiring that selectively interconnects the microelectronic devices. After stacking, a via is formed that extends through at least two of the integrated circuits that are stacked upon one another. Then, the via is filled with conductive material that selectively electrically contacts the wiring. Related microelectronic packages are also described.
    Type: Grant
    Filed: January 26, 2012
    Date of Patent: November 27, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Pil-kyu Kang, Jung-Ho Kim, Jong-Wook Lee, Seung-woo Choi, Dae-Lok Bae
  • Patent number: 8293613
    Abstract: An embodiment of a semiconductor device includes a semiconductor substrate, a first insulating layer formed over the semiconductor substrate, and a first semiconductor layer formed over the first insulation layer. At least one gettering region is formed in at least one of the first insulating layer and the first semiconductor layer. The gettering region includes a plurality of gettering sites, and at least one gettering site includes one of a precipitate, a dispersoid, an interface with the dispersoid, a stacking fault and a dislocation.
    Type: Grant
    Filed: November 29, 2010
    Date of Patent: October 23, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Soo Park, Young-Nam Kim, Young-Sam Lim, Gi-Jung Kim, Pil-Kyu Kang
  • Publication number: 20120132986
    Abstract: A semiconductor device includes a substrate having a plurality of horizontal channel transistors formed thereon, an insulation layer structure on the substrate and covering the horizontal transistors, and a plurality of vertical channel transistors on the insulation layer structure.
    Type: Application
    Filed: October 3, 2011
    Publication date: May 31, 2012
    Inventors: Pil-Kyu Kang, Dae-Lok Bae, Gil-Heyun Choi, Suk-Chul Bang, Byung-Lyul Park, Kwang-Jin Moon, Dong-Chan Lim, Deok-Young Jung
  • Publication number: 20120119383
    Abstract: Microelectronic packages are fabricated by stacking integrated circuits upon one another. Each integrated circuit includes a semiconductor layer having microelectronic devices and a wiring layer on the semiconductor layer having wiring that selectively interconnects the microelectronic devices. After stacking, a via is formed that extends through at least two of the integrated circuits that are stacked upon one another. Then, the via is filled with conductive material that selectively electrically contacts the wiring. Related microelectronic packages are also described.
    Type: Application
    Filed: January 26, 2012
    Publication date: May 17, 2012
    Inventors: Pil-kyu Kang, Jung-Ho Kim, Jong-Wook Lee, Seung-woo Choi, Dae-Lok Bae
  • Publication number: 20120108034
    Abstract: Provided are a substrate structure which may solve problems generated in a manufacturing process while having a relatively low resistance buried wiring, a method for manufacturing the substrate structure, and a semiconductor device and a method for manufacturing the same using the substrate structure. The substrate structure may include a supporting substrate, an insulating layer disposed on the supporting substrate, a line-shaped conductive layer pattern disposed in the insulating layer to extend in a first direction, and a line-shaped semiconductor pattern disposed in the insulating layer and on the conductive layer pattern to extend in the first direction and having a top surface exposed to the outside of the insulating layer.
    Type: Application
    Filed: September 22, 2011
    Publication date: May 3, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dae-Lok Bae, Gil-Heyun Choi, Byung-Lyul Park, Pil-Kyu Kang
  • Patent number: 8163616
    Abstract: Nonvolatile memory devices and methods of manufacturing nonvolatile memory devices are provided. The method includes patterning a bulk substrate to form an active pillar; forming a charge storage layer on a side surface of active pillar; and forming a plurality of gates connected to the active pillar, the charge storage layer being disposed between the active pillar and the gates. Before depositing a gate, a bulk substrate is etched using a dry etching to form a vertical active pillar which is in a single body with a semiconductor substrate.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: April 24, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Pil-Kyu Kang, Daelok Bae, Jongwook Lee, Seungwoo Choi, Yong-Hoon Son, Jong-Hyuk Kang, Jung Ho Kim
  • Publication number: 20120088323
    Abstract: A method for forming a light guide layer with improved transmission reliability in a semiconductor substrate, the method including forming a trench in the semiconductor substrate, forming a cladding layer and a preliminary light guide layer in the trench such that only one of opposite side end portions of the preliminary light guide layer is in contact with an inner sidewall of the trench, and performing a thermal treatment on the substrate to change the preliminary light guide layer into the light guide layer.
    Type: Application
    Filed: September 23, 2011
    Publication date: April 12, 2012
    Inventors: DAE-LOK BAE, Byung-Lyul Park, Pil-Kyu Kang, Gil-Heyun Choi, Kwang-Jin Moon
  • Patent number: 8129833
    Abstract: Microelectronic packages are fabricated by stacking integrated circuits upon one another. Each integrated circuit includes a semiconductor layer having microelectronic devices and a wiring layer on the semiconductor layer having wiring that selectively interconnects the microelectronic devices. After stacking, a via is formed that extends through at least two of the integrated circuits that are stacked upon one another. Then, the via is filled with conductive material that selectively electrically contacts the wiring. Related microelectronic packages are also described.
    Type: Grant
    Filed: October 27, 2009
    Date of Patent: March 6, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Pil-kyu Kang, Jung-Ho Kim, Jong-Wook Lee, Seung-woo Choi, Dae-Lok Bae
  • Publication number: 20120052635
    Abstract: A conductive layer buried-type substrate is disclosed. The substrate includes a silicon oxidation layer bonded to a supporting substrate, an adhesion promotion layer that is formed on the silicon oxidation layer and improves an adhesion between the silicon oxidation layer and a conductive layer, wherein the conductive layer is formed on the adhesion promotion layer and comprises a metal layer, and a single crystal semiconductor layer formed on the conductive layer.
    Type: Application
    Filed: August 30, 2011
    Publication date: March 1, 2012
    Inventors: Pil-kyu Kang, Gil-heyun Choi, Dae-lok Bae, Byung-Iyul Park, Dong-kak Lee
  • Publication number: 20120039564
    Abstract: A photoelectric integrated circuit device may include a substrate including an electronic device region and an on die optical input/output device region, the substrate having a trench in the on die optical input/output device region; a lower clad layer provided in the trench, the lower clad layer having an upper surface lower than a surface of the substrate; a core provided on the lower clad layer; an insulating pattern provided on the core; an optical detection pattern provided on the insulating pattern, the optical detection pattern having at least a portion provided in the trench; and at least one transistor provided on the substrate of the electronic device region.
    Type: Application
    Filed: July 27, 2011
    Publication date: February 16, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Pil-Kyu Kang, GilHeyun Choi, Sukchul Bang, Daelok Bae, Byung-Lyul Park, KwangJin Moon, Dong-Chan Lim, Deok-Young Jung
  • Publication number: 20120025265
    Abstract: A method of manufacturing a photodetector structure is provided. The method includes forming a structural layer by making a trench in a bulk silicon substrate and filling the trench with a cladding material, forming a single-crystallized silicon layer on the structural layer, and forming a germanium layer on the single-crystallized silicon layer.
    Type: Application
    Filed: July 27, 2011
    Publication date: February 2, 2012
    Inventors: Ho-Chul JI, Kyoung Won NA, Kyoung Ho HA, Pil-Kyu KANG
  • Publication number: 20120009747
    Abstract: Nonvolatile memory devices and methods of manufacturing nonvolatile memory devices are provided. The method includes patterning a bulk substrate to form an active pillar; forming a charge storage layer on a side surface of active pillar; and forming a plurality of gates connected to the active pillar, the charge storage layer being disposed between the active pillar and the gates. Before depositing a gate, a bulk substrate is etched using a dry etching to form a vertical active pillar which is in a single body with a semiconductor substrate.
    Type: Application
    Filed: September 21, 2011
    Publication date: January 12, 2012
    Inventors: Pil-Kyu Kang, Daelok Bae, Jongwook Lee, Seungwoo Choi, Yong-Hoon Son, Jong-Hyuk Kang, Jung Ho Kim
  • Publication number: 20110316168
    Abstract: A semiconductor device includes a via structure and a conductive structure. The via structure has a surface with a planar portion and a protrusion portion. The conductive structure is formed over at least part of the planar portion and not over at least part of the protrusion portion of the via structure. For example, the conductive structure is formed only onto the planar portion and not onto any of the protrusion portion for forming high quality connection between the conductive structure and the via structure.
    Type: Application
    Filed: October 27, 2010
    Publication date: December 29, 2011
    Inventors: Kwang-Jin Moon, Pil-Kyu Kang, Dae-Lok Bae, Gil-Heyun Choi, Byung-Lyul Park, Dong-Chan Lim, Deok-Young Jung
  • Patent number: 8053829
    Abstract: Nonvolatile memory devices and methods of manufacturing nonvolatile memory devices are provided. The method includes patterning a bulk substrate to form an active pillar; forming a charge storage layer on a side surface of active pillar; and forming a plurality of gates connected to the active pillar, the charge storage layer being disposed between the active pillar and the gates. Before depositing a gate, a bulk substrate is etched using a dry etching to form a vertical active pillar which is in a single body with a semiconductor substrate.
    Type: Grant
    Filed: December 10, 2009
    Date of Patent: November 8, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Pil-Kyu Kang, Daelok Bae, Jongwook Lee, Seungwoo Choi, Yong-Hoon Son, Jong-Hyuk Kang, Jung Ho Kim
  • Patent number: 8048784
    Abstract: Methods for manufacturing a semiconductor device include forming a seed layer containing a silicon material on a substrate. An amorphous silicon layer containing amorphous silicon material is formed on the seed layer. The amorphous silicon layer is doped with an impurity. A laser beam is irradiated onto the amorphous silicon layer to produce a phase change of the amorphous silicon layer and change the amorphous silicon layer into a single-crystal silicon layer based on the seed layer.
    Type: Grant
    Filed: September 23, 2008
    Date of Patent: November 1, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Pil-Kyu Kang, Yong-Hoon Son, Jong-Wook Lee
  • Publication number: 20110250738
    Abstract: A method of forming a silicon based optical waveguide can include forming a silicon-on-insulator structure including a non-crystalline silicon portion and a single crystalline silicon portion of an active silicon layer in the structure. The non-crystalline silicon portion can be replaced with an amorphous silicon portion and maintaining the single crystalline silicon portion and the amorphous portion can be crystallized using the single crystalline silicon portion as a seed to form a laterally grown single crystalline silicon portion including the amorphous and single crystalline silicon portions.
    Type: Application
    Filed: April 8, 2011
    Publication date: October 13, 2011
    Inventors: Pil-Kyu Kang, Dae-Lok Bae, Gil-Heyun Choi, Jong-Myeong Lee
  • Publication number: 20110243492
    Abstract: A silicon based optical modulator apparatus can include a lateral slab on an optical waveguide, the lateral slab protruding beyond side walls of the optical waveguide so that a portion of the optical waveguide protrudes from the lateral slab towards a substrate.
    Type: Application
    Filed: March 16, 2011
    Publication date: October 6, 2011
    Inventors: Kyoung-won NA, Sung-dong Suh, Kyoung-ho Ha, Seong-gu Kim, Jin-kwon Bok, Dong-jae Shin, Ho-chul Ji, Pil-kyu Kang, In-sung Joe