Abstract: A semiconductor device includes: M*1st conductors in a first layer of metallization (M*1st layer) and being aligned correspondingly along different corresponding ones of alpha tracks and representing corresponding inputs of a cell region in the semiconductor device; and M*2nd conductors in a second layer of metallization (M*2nd layer) aligned correspondingly along beta tracks, and the M*2nd conductors including at least one power grid (PG) segment and one or more of an output pin or a routing segment; and each of first and second ones of the input pins having a length sufficient to accommodate at most two access points; each of the access points of the first and second input pins being aligned to a corresponding different one of first to fourth beta tracks; and the PG segment being aligned with one of the first to fourth beta tracks.

Abstract: A thin film transistor includes an active layer located over a substrate, a first gate stack including a stack of a first gate dielectric and a first gate electrode and located on a first surface of the active layer, a pair of first contact electrodes contacting peripheral portions of the first surface of the active layer and laterally spaced from each other along a first horizontal direction by the first gate electrode, a second contact electrode contacting a second surface of the active layer that is vertically spaced from the first surface of the active layer, and a pair of second gate stacks including a respective stack of a second gate dielectric and a second gate electrode and located on a respective peripheral portion of a second surface of the active layer.

Abstract: Provided is a semiconductor device includes a gate electrode, a gate dielectric layer, a channel layer, an insulating layer, a first source/drain electrode and a second source/drain electrode, a second dielectric layer, and a stop segment. The gate electrode is located within a first dielectric layer that overlies a substrate. The gate dielectric layer is located over the gate electrode. The channel layer is located on the gate dielectric layer. The insulating layer is located over the channel layer. The first source/drain electrode and the second source/drain electrode are located in the insulating layer, and connected to the channel layer. The second dielectric layer is beside one of the first source/drain electrode and the second source/drain electrode. The stop segment is embedded in the second dielectric layer.

Abstract: Various schemes pertaining to generating a full-frame color image using a hybrid sensor are described. An apparatus receives sensor data from the hybrid sensor, wherein the sensor data includes partial-frame chromatic data of a plurality of chromatic channels and partial-frame color-insensitive data. The apparatus subsequently generates full-frame color-insensitive data based on the partial-frame color-insensitive data. The apparatus subsequently generates the full-frame color image based on the full-frame color-insensitive data and the partial-frame chromatic data. The apparatus provides benefits of enhancing image quality of the full-frame color image especially under low light conditions.

Abstract: An image enhancement method applied to an image enhancement apparatus and includes acquiring a first edge feature from a first spectral image and a second edge feature from a second spectral image, analyzing similarity between the first edge feature and the second edge feature to align the first spectral image with the second spectral image, acquiring at least one first detail feature from the first spectral image and at least one second detail feature from the second spectral image, comparing the first edge feature and the second edge feature to generate a first weight and a second weight, and fusing the first detail feature weighted by the first weight with the second detail feature weighted by the second weight to generate a fused image. The first spectral image and the second spectral image are captured at the same point of time.

Abstract: Disclosed is a method for manufacturing a circuit board, including preparing a substrate having a resin layer and a stop layer, forming at least one conduction hole penetrating the resin layer and stopping at the stop layer, forming a first metal layer through a sputtering process, forming a second metal layer on the first metal layer through a chemical plating process, forming a third metal layer having a circuit pattern, exposing part of the second metal layer and filling up the conduction hole through an electroplating process, and etching the second metal layer and the first metal layer under the second metal layer to expose the resin layer under the first metal layer. Since the first metal layer provides excellent surface properties, the second and third metal layers are well fixed and stable. The etched circuit pattern has a line width/pitch less than 10 ?m for fine line width/pitch.

Abstract: Disclosed is a method for manufacturing a circuit board, including preparing a substrate having a resin layer and a stop layer, forming at least one conduction hole penetrating the resin layer and stopping at the stop layer, forming a first metal layer through a sputtering process, forming a second metal layer on the first metal layer through a chemical plating process, forming a third metal layer having a circuit pattern, exposing part of the second metal layer and filling up the conduction hole through an electroplating process, and etching the second metal layer and the first metal layer under the second metal layer to expose the resin layer under the first metal layer. Since the first metal layer provides excellent surface properties, the second and third metal layers are well fixed and stable. The etched circuit pattern has a line width/pitch less than 10 ?m for fine line width/pitch.

Abstract: Disclosed is a circuit board structure, including the first, second and third metal layers sequentially stacked on the substrate from bottom to top and formed by the sputtering process, the chemical plating process and the electroplating process, respectively. The substrate includes the stop layer and the resin layer stacked on the stop layer. The stop layer includes a pattern having at least one contact region, which is not covered by the resin layer. The first, second and third metal layers have an etched circuit pattern, respectively, and each of the etched circuit patterns is provided out of the corresponding contact region and aligned to each other to expose part of the resin layer. The etched circuit pattern is used for electrical connection. Since the first metal layer provides excellent surface properties, the second and third metal layers are well fixed and more stable.

Abstract: A system and a method for monitoring change of intraocular pressure and a contact lens for sensing change of intraocular pressure are provided. The contact lens includes a first material layer and a first pattern. The center of the first material layer has an optical region, and the optical region corresponds to a cornea region of an eyeball. The first pattern is formed on the optical region. Furthermore, the contact lens may further include a second material layer and a second pattern. The second material layer is located on the first material layer. The second pattern is formed on the second material layer and overlaps with the first pattern to form a moire pattern.

Abstract: An optical component includes a substrate and two optical lenses, and the substrate and the two optical lenses are an integrated and inseparable structure. A groove that can accommodate a required collimating optical element is provided on the substrate, or a collimating optical element and the substrate are integrated. Because fabrication of optical elements is completed during fabrication of the optical component, the number of elements to fabricate and time and cost of fabricating the elements can be reduced. Also, during assembly of an image capturing device, it is only required that the optical component is locked to a body of the image capturing device to complete arrangement of a front panel and the optical elements, which can greatly simplify an assembly procedure and shorten assembly time.

Abstract: An optical component includes a substrate and two optical lenses, and the substrate and the two optical lenses are an integrated and inseparable structure. A groove that can accommodate a required collimating optical element is provided on the substrate, or a collimating optical element and the substrate are integrated. Because fabrication of optical elements is completed during fabrication of the optical component, the number of elements to fabricate and time and cost of fabricating the elements can be reduced. Also, during assembly of an image capturing device, it is only required that the optical component is locked to a body of the image capturing device to complete arrangement of a front panel and the optical elements, which can greatly simplify an assembly procedure and shorten assembly time.

Abstract: A system and a method for monitoring change of intraocular pressure and a contact lens for sensing change of intraocular pressure are provided. The contact lens includes a first material layer and a first pattern. The center of the first material layer has an optical region, and the optical region corresponds to a cornea region of an eyeball. The first pattern is formed on the optical region. Furthermore, the contact lens may further include a second material layer and a second pattern. The second material layer is located on the first material layer. The second pattern is formed on the second material layer and overlaps with the first pattern to form a moire pattern.