Patents by Inventor Ping Chang

Ping Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12001132
    Abstract: Fabricating a photomask includes forming a protection layer over a substrate. A plurality of multilayers of reflecting films are formed over the protection layer. A capping layer is formed over the plurality of multilayers. An absorption layer is formed over capping layer. A first photoresist layer is formed over portions of absorption layer. Portions of the first photoresist layer and absorption layer are patterned, forming first openings in absorption layer. The first openings expose portions of the capping layer. Remaining portions of first photoresist layer are removed and a second photoresist layer is formed over portions of absorption layer. The second photoresist layer covers at least the first openings. Portions of the absorption layer and capping layer and plurality of multilayer of reflecting films not covered by the second photoresist layer are patterned, forming second openings. The second openings expose portions of protection layer and second photoresist layer is removed.
    Type: Grant
    Filed: August 7, 2019
    Date of Patent: June 4, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Pei-Cheng Hsu, Ta-Cheng Lien, Ping-Hsun Lin, Shih-Che Wang, Hsin-Chang Lee
  • Patent number: 12002774
    Abstract: An integrated circuit (IC) comprising an enhanced passivation scheme for pad openings and trenches is provided. In some embodiments, an interlayer dielectric (ILD) layer covers a substrate and at least partially defines a trench. The trench extends through the ILD layer from a top of the ILD layer to the substrate. A conductive pad overlies the ILD layer. A first passivation layer overlies the ILD layer and the conductive pad, and further defines a pad opening overlying the conductive pad. A second passivation layer overlies the ILD layer, the conductive pad, and the first passivation layer, and further lines sidewalls of the first passivation layer in the pad opening and sidewalls of the ILD layer in the trench. Further, the second passivation layer has a low permeability for moisture or vapor relative to the ILD layer.
    Type: Grant
    Filed: September 8, 2022
    Date of Patent: June 4, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Hong Chang, Chun-Yi Yang, Kun-Ming Huang, Po-Tao Chu, Shen-Ping Wang, Chien-Li Kuo
  • Publication number: 20240178498
    Abstract: A cabinet for receiving an energy storage apparatus includes a substantially cube-shaped frame and a plurality of sheet-shaped concrete structures attached to the frame. The sheet-shaped concrete structure includes an ultra-high performance concrete (UHPC).
    Type: Application
    Filed: October 17, 2023
    Publication date: May 30, 2024
    Inventor: An-Ping CHANG
  • Publication number: 20240176335
    Abstract: A fault detection method, includes the following steps. A target sequence is received, the target sequence includes several data. A first moving average operation is performed on the target sequence to establish a first moving average sequence. A second moving average operation is performed on the target sequence to establish a second moving average sequence. A difference operation between the first moving average sequence and the second moving average sequence is performed to obtain a difference sequence, the difference sequence includes several difference values. An upper limit value is set. When one of the difference values is greater than the upper limit value, the target sequence is determines as abnormal.
    Type: Application
    Filed: February 6, 2024
    Publication date: May 30, 2024
    Inventors: Yung-Yu Yang, Kang-Ping Li, Chih-Kuan Chang, Chung-Chih Hung, Chen-Hui Huang, Nai-Ying Lo, Shih-Wei Huang
  • Publication number: 20240175920
    Abstract: The present disclosure provides a semiconductor wafer. The semiconductor wafer includes: a scribe line between a first row of dies and a second row of dies, and a benchmark circuit disposed on the scribe line. The benchmark circuit includes a first switching circuit, a first process control monitoring (PCM) device and a second PCM device coupled to the first switching circuit, and a second switching circuit. The first switching circuit is configured to selectively couple the first PCM device and the second PCM device to receive a test signal, wherein the first PCM device and the second PCM device are configured to output a first output signal and a second output signal in response to the test signal, respectively. The second switching circuit is configured to selectively couple the first PCM device and the second PCM device to output the first output signal or the second output signal.
    Type: Application
    Filed: February 6, 2024
    Publication date: May 30, 2024
    Inventors: CHU-FENG LIAO, HUNG-PING CHENG, YUAN-YAO CHANG, SHUO-WEN CHANG
  • Publication number: 20240170543
    Abstract: A method of fabricating a semiconductor structure includes selective use of a cladding layer during the fabrication process to provide critical dimension uniformity. The cladding layer can be formed before forming a recess in an active channel structure or can be formed after filling a recess in an active channel structure with dielectric material. These techniques can be used in semiconductor structures such as gate-all-around (GAA) transistor structures implemented in an integrated circuit.
    Type: Application
    Filed: January 30, 2024
    Publication date: May 23, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuei-Yu KAO, Shih-Yao LIN, Chen-Ping CHEN, Chih-Han LIN, Ming-Ching CHANG, Chao-Cheng CHEN
  • Publication number: 20240165547
    Abstract: A gas deflector contains: a body and a guide unit. The body includes at least one inflow orifice, at least one outflow orifice, and multiple suction orifices. The guide unit includes a support plate, a through orifice, a conduct assembly, a collection assembly including a collecting channel, and a spray orifice. The conduct assembly includes two guiders, a drain orifice extending along the conduct assembly and corresponding to the through orifice and the collecting channel. The collection assembly corresponds to the drain orifice, and the collection assembly includes at least one collector sheet fixed on a bottom of the conduct assembly, and at least one gas conducting element received in the collecting channel. Furthermore, an exhaust channel is defined among the body, the collection assembly and the support plate, and the exhaust channel is in communication with at least one suction orifice of the multiple suction orifices.
    Type: Application
    Filed: December 13, 2022
    Publication date: May 23, 2024
    Inventor: Wei-Ping Chang
  • Publication number: 20240170336
    Abstract: A semiconductor device includes a plurality of semiconductor layers vertically separated from one another. The semiconductor device includes a gate structure that comprises a lower portion and an upper portion, wherein the lower portion wraps around each of the plurality of semiconductor layers. The semiconductor device includes a gate spacer that extends along a sidewall of the upper portion of the gate structure and has a bottom surface. A portion of the bottom surface of the gate spacer and a top surface of a topmost one of the plurality of semiconductor layers form an angle that is less than 90 degrees.
    Type: Application
    Filed: January 30, 2024
    Publication date: May 23, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuei-Yu Kao, Chao-Cheng Chen, Chih-Han Lin, Chen-Ping Chen, Ming-Ching Chang, Shih-Yao Lin, Chih-Chung Chiu
  • Patent number: 11988625
    Abstract: A capacitive biosensor is provided. The capacitive biosensor includes: a transistor, an interconnect structure on the transistor, and a passivation layer on the interconnect structure. The interconnect structure includes a first metal structure on the transistor, a second metal structure on the first metal structure, and a third metal structure on the second metal structure. The third metal structure includes a first conductive layer, a second conductive layer, and a third conductive layer that are sequentially stacked. The passivation has an opening exposing a portion of the third metal structure. The capacitive biosensor further includes a sensing region on the interconnect structure. The sensing region includes a first sensing electrode and a second sensing electrode. The first sensing electrode is formed of the third conductive layer, and the second sensing electrode is disposed on the passivation layer.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: May 21, 2024
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Cheng-Ping Chang, Chien-Hui Li, Chien-Hsun Wu, Tai-I Yang, Yung-Hsiang Chen
  • Publication number: 20240162455
    Abstract: A battery cell including a membrane electrode assembly, a cathode bipolar plate and an anode bipolar plate. The anode bipolar plate includes a metal layer and a thermally conductive layer. The metal layer is stacked on a side of the membrane electrode assembly that is located farthest away from the cathode bipolar plate. The metal layer has a bottom surface, a top surface, a first side surface and a second side surface. The bottom surface faces the membrane electrode assembly. The thermally conductive layer includes a first cover layer and two second cover layers. The first cover layer covers the top surface of the metal layer. The two second cover layers protrude from two opposite sides of the first cover layer, respectively. The two second cover layers at least partially cover the first side surface and the second side surface of the metal layer, respectively.
    Type: Application
    Filed: March 16, 2023
    Publication date: May 16, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chien-Ming LAI, Sung-Chun CHANG, Chiu-Ping HUANG, Li-Duan TSAI
  • Publication number: 20240156983
    Abstract: The present invention provides quaternary ammonium cyclodextrin and a preparation method and uses thereof, as well as a silver nanoparticle-cyclodextrin complex and a preparation method and uses thereof. The quaternary ammonium cyclodextrin of the present invention is introduced with an amine group and quaternary ammonium groups, while retaining the special structure and properties of cyclodextrin itself. The amine group contained in the structure plays a role in reducing and complexing Ag+ in the synthesis of AgNPs, and plays a certain role in stabilizing nanoparticles and forming a complex in combination with quaternary ammonium groups.
    Type: Application
    Filed: October 24, 2023
    Publication date: May 16, 2024
    Applicant: Hubei University of Chinese Medicine
    Inventors: Junfeng LIU, Junfeng ZAN, Ping WANG, Guohua ZHENG, Laichun LUO, Cong CHANG, Ke YANG
  • Publication number: 20240161798
    Abstract: A device includes a memory array, bit line pairs, word lines, a modulation circuit and a control signal generator. The memory array has bit cells arranged in rows and columns. Each bit line pair is connected to a respective column of bit cells. Each word line is connected to a respective row of bit cells. The modulation circuit is coupled with at least one bit line pair. The control signal generator is coupled with the modulation circuit. The control signal generator includes a tracking wiring with a tracking length positively correlated with a depth distance of the word lines. The control signal generator is configured to produce a control signal, switching to a first voltage level for a first time duration in reference with the tracking length, for controlling the modulation circuit. A method of controlling aforesaid device is also disclosed.
    Type: Application
    Filed: January 25, 2024
    Publication date: May 16, 2024
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC NANJING COMPANY LIMITED, TSMC CHINA COMPANY LIMITED
    Inventors: Xiu-Li YANG, He-Zhou WAN, Mu-Yang YE, Lu-Ping KONG, Ming-Hung CHANG
  • Publication number: 20240161818
    Abstract: The invention provides a layout pattern of static random access memory (SRAM), which at least comprises a plurality of gate structures located on a substrate and spanning the plurality of fin structures to form a plurality of transistors distributed on the substrate, wherein the plurality of transistors comprise two pull-up transistors (PU), two pull-down transistors (PD) to form a latch circuit, and two access transistors (PG) connected to the latch circuit. In each SRAM memory cell, the fin structure included in the pull-up transistor (PU) is defined as a PU fin structure, the fin structure included in the pull-down transistor (PD) is defined as a PD fin structure, and the fin structure included in the access transistor (PG) is defined as a PG fin structure, wherein a width of the PD fin structure is wider than a width of the PG fin structure.
    Type: Application
    Filed: November 30, 2022
    Publication date: May 16, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Hsien Huang, Yu-Tse Kuo, Shu-Ru Wang, Li-Ping Huang, Yu-Fang Chen, Chun-Yen Tseng, Tzu-Feng Chang, Chun-Chieh Chang
  • Patent number: 11982936
    Abstract: A method of fabricating a photomask includes selectively exposing portions of a photomask blank to radiation to change an optical property of the portions of the photomask blank exposed to the radiation, thereby forming a pattern of exposed portions of the photomask blank and unexposed portions of the photomask blank. The pattern corresponds to a pattern of semiconductor device features.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsin-Chang Lee, Ping-Hsun Lin, Yen-Cheng Ho, Chih-Cheng Lin, Chia-Jen Chen
  • Publication number: 20240148301
    Abstract: The present invention provides a smart wearable device, which is held on an upper body of a wearer by a plurality of contact pad sets, and has a connection unit, a first sensing module, a second sensing module, and an extension unit.
    Type: Application
    Filed: November 7, 2022
    Publication date: May 9, 2024
    Inventors: Chien-Hsiang Chang, Yang-Cheng Lin, Wei-Chih Lien, Tseng-Ping Chiu, Pei-Yun Wu, Bo Liu
  • Publication number: 20240148137
    Abstract: The present disclosure provides a cabinet unit and a cabinet system. The cabinet unit includes a plurality of side walls consisting of a plurality of side wall units. A plurality of cabinet units are connected to one another to form the cabinet system.
    Type: Application
    Filed: October 17, 2023
    Publication date: May 9, 2024
    Inventor: An-Ping CHANG
  • Publication number: 20240149057
    Abstract: A device for treating a user's skin using plasma is provided. The device comprises a plasma generation assembly and a power supply. The plasma generation assembly comprises a discharge electrode including a first surface; a first dielectric material layer provided on the first surface of the discharge electrode and the first surface, a ground electrode surrounding the discharge electrode, and an insulation member spacing around the discharge electrode from the ground electrode. The power supply configured to apply power to the plasma generation assembly so that plasma is generated from the first surface of the discharge electrode to the ground electrode and between the first dielectric material layer and the user's skin.
    Type: Application
    Filed: November 4, 2022
    Publication date: May 9, 2024
    Inventors: HUI-FANG LI, YU-TING LIN, CHUN-HAO CHANG, CHIH-TUNG LIU, CHUN-PING HSIAO, YU-PIN CHENG
  • Patent number: 11979479
    Abstract: A packet sorting and reassembly circuit module, including a header parser, an information processing circuit, at least one state tracking and reassembly circuit, and an output arbiter, is provided. The header parser is configured to analyze multiple first packet segments to obtain header information corresponding to a first network packet, wherein the first network packet is transmitted based on a transmission control protocol (TCP) communication protocol. The information processing circuit is configured to transmit the first packet segments and sideband information corresponding to the first packet segments to a first state tracking and reassembly circuit among the at least one state tracking and reassembly circuit according to the header information. The first state tracking and reassembly circuit is configured to reassemble and sort the first packet segments according to the sideband information. The output arbiter is configured to output the first packet segments according to a sorting result.
    Type: Grant
    Filed: January 16, 2023
    Date of Patent: May 7, 2024
    Assignees: Chung Yuan Christian University, KGI Securities Co. Ltd.
    Inventors: Yu-Kuen Lai, Chao-Lin Wang, He-Ping Li, Cheng-Han Chuang, Kai-Po Chang
  • Patent number: 11978929
    Abstract: A close-end fuel cell and an anode bipolar plate thereof are provided. The anode bipolar plate includes an airtight conductive frame and a conductive porous substrate disposed within the airtight conductive frame. In the airtight conductive frame, an edge of a first side has a fuel inlet, and an edge of a second side has a fuel outlet. The conductive porous substrate has at least one flow channel, where a first end of the flow channel communicates with the fuel inlet, a second end of the flow channel communicates with the fuel outlet. The flow channel is provided with a blocking part near the fuel inlet to divide the flow channel into two areas.
    Type: Grant
    Filed: August 23, 2021
    Date of Patent: May 7, 2024
    Assignee: Industrial Technology Research Institute
    Inventors: Sung-Chun Chang, Chien-Ming Lai, Chiu-Ping Huang, Li-Duan Tsai, Keng-Yang Chen
  • Publication number: 20240142276
    Abstract: A battery-free rotation detecting device includes a rotatable carrier, a first magnetic element, a second magnetic element, a magnetic field shield and a detection coil set. The rotatable carrier has a rotation axis. The first magnetic element is located on the rotatable carrier and has a plurality of first magnetizing portions, and the magnetization directions of the first magnetizing portions are parallel to the rotation axis. The second magnetic element is spaced apart from the first magnetic element and has a plurality of second magnetizing portions. The magnetization directions of the second magnetizing portions are parallel to the rotation axis. The magnetic field shield located on the first magnetic element or the second magnetic element, is used to reduce the magnetic flux density between the first magnetic element and the second magnetic element. The detection coil set is located between the first magnetic element and the second magnetic element.
    Type: Application
    Filed: March 10, 2023
    Publication date: May 2, 2024
    Inventor: JUI-PING CHANG