Patents by Inventor Ping Chao Ho

Ping Chao Ho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9490760
    Abstract: The present invention provides a self-timed differential amplifier, including an amplifier unit, having a pair of read/write terminals, wherein data is read or written by a select line; a pair of precharge transistors, controlled by a control line; and a pair of cross-coupled transistors, controlled by a column select line. Moreover, a complementary differential amplifier is formed by the combination of the pair of precharge transistors and the pair of cross-coupled transistors. The pair of the precharge transistors and the pair of cross-coupled transistors are connected to the pair of read/write terminals of the amplifier unit.
    Type: Grant
    Filed: January 7, 2015
    Date of Patent: November 8, 2016
    Assignee: CHINGIS TECHNOLOGY CORPORATION
    Inventors: Mingshiang Wang, Ping-Chao Ho
  • Publication number: 20160156314
    Abstract: The present invention provides a self-timed differential amplifier, including an amplifier unit, having a pair of read/write terminals, wherein data is read or written by a select line; a pair of precharge transistors, controlled by a control line; and a pair of cross-coupled transistors, controlled by a column select line. Moreover, a complementary differential amplifier is formed by the combination of the pair of precharge transistors and the pair of cross-coupled transistors. The pair of the precharge transistors and the pair of cross-coupled transistors are connected to the pair of read/write terminals of the amplifier unit.
    Type: Application
    Filed: January 7, 2015
    Publication date: June 2, 2016
    Inventors: Mingshiang Wang, Ping-Chao Ho
  • Patent number: 6091653
    Abstract: The present invention provides a method of sensing data in a semiconductor device. First, an equalizing instructing signal is provided to stop precharging and equalizing the bit line pair while in a reading state. Then a wordline is selected to transmit the data in a memory cell to one of the pair of bit lines for obtaining a potential difference between the bit line pair. A sensing enable signal is subsequently provided to activate the shared sense amplifier for sensing and amplifying the data. And a potential level of the selecting control signal is boosted to a boosted potential level to restore and read the data by delaying a predetermined period of time.
    Type: Grant
    Filed: August 17, 1999
    Date of Patent: July 18, 2000
    Assignee: Nanya Technology Corporation
    Inventors: Shiou-Yu Alex Wang, Ping Chao Ho, Mingshiang Wang