Abstract: A fingerprint sensing system comprising a plurality of conductive selection lines; a plurality of conductive read-out lines crossing the selection lines; selection circuitry controllable to provide a selection signal on at least one selected selection line in the plurality of selection lines; a plurality of pixel elements formed at intersections between the selection lines and the read-out lines; current providing circuitry coupled to the read-out lines and controllable to generate a current pulse in at least one of the read-out lines when reading out a sensing signal from each of the pixel elements.

Abstract: The present invention discloses an organic polymer film and a manufacturing method thereof. The organic polymer film is mainly manufactured by the following steps. Firstly, the step (A) provides a xylene precursor and a substrate, and the step (B) places the substrate inside of a plasma equipment. After that, the step (C) evacuates the plasma equipment while introducing a carrier gas which carries vapor of the xylene precursor, and the step (D) turns on a pulse power supply system of the plasma equipment, generating a short pulse for plasma ignition. Finally, the step (E) forms the organic polymer film on the substrate. In the aforementioned steps, the frequency of the short pulse plasma is between 1 Hz˜10,000 Hz, and the pulse period of the short pulse plasma is between 1 ?s˜60 ?s.

Abstract: A fingerprint sensing system comprising a plurality of conductive selection lines; a plurality of conductive read-out lines crossing the selection lines; selection circuitry controllable to provide a selection signal on at least one selected selection line in the plurality of selection lines; a plurality of pixel elements formed at intersections between the selection lines and the read-out lines; current providing circuitry coupled to the read-out lines and controllable to generate a current pulse in at least one of the read-out lines when reading out a sensing signal from each of the pixel elements.

Abstract: An operational amplifier includes a first output transistor and a second output transistor connected in series between two power nodes, the second output transistor having a semiconductor type opposite to the first output transistor, the first output transistor and the second output transistor being electrically coupled at an output node, and gates of the first output transistor and the second output transistor being connected to a first drive node and a second drive node respectively; and a decoupling capacitor circuit electrically connected between the first drive node and the second drive node.

Abstract: An operational amplifier includes a first output transistor and a second output transistor connected in series between two power nodes, the second output transistor having a semiconductor type opposite to the first output transistor, the first output transistor and the second output transistor being electrically coupled at an output node, and gates of the first output transistor and the second output transistor being connected to a first drive node and a second drive node respectively; and a decoupling capacitor circuit electrically connected between the first drive node and the second drive node.

Abstract: A capacitor includes a first transistor, a second transistor, and a control circuit. The first terminal of the first transistor is coupled to the first terminal of the capacitor. The first terminal of the second transistor is coupled to the second terminal of the capacitor. In a normal mode, the control circuit turns on the first transistor and the second transistor, the second terminal of the second transistor is coupled to the control terminal of the first transistor through the control circuit, and the control terminal of the second transistor is coupled to the second terminal of the first transistor through the control circuit. In a power saving mode, the control circuit turns off the first transistor and the second transistor.

Abstract: A capacitor includes a first transistor, a second transistor, and a control circuit. The first terminal of the first transistor is coupled to the first terminal of the capacitor. The first terminal of the second transistor is coupled to the second terminal of the capacitor. In a normal mode, the control circuit turns on the first transistor and the second transistor, the second terminal of the second transistor is coupled to the control terminal of the first transistor through the control circuit, and the control terminal of the second transistor is coupled to the second terminal of the first transistor through the control circuit. In a power saving mode, the control circuit turns off the first transistor and the second transistor.

Abstract: The present invention provides a voltage level shifter architecture applicable for positive and negative voltage shifting, in which a shielding circuit is configured to relax the voltage stress of the transistors in the input stage circuit, and a switching circuit is configured to avoid current leakage. In addition, designing the power domain(s) of the n-well P-type transistors in the voltage-level shifter makes the voltage-level shifter area-efficient and power-efficient or design-flexible and application-adaptive.