Abstract: A component includes a substrate and a capacitor formed in contact with the substrate. The substrate can consist essentially of a material having a coefficient of thermal expansion of less than 10 ppm/° C. The substrate can have a surface and an opening extending downwardly therefrom. The capacitor can include at least first and second pairs of electrically conductive plates and first and second electrodes. The first and second pairs of plates can be connectable with respective first and second electric potentials. The first and second pairs of plates can extend along an inner surface of the opening, each of the plates being separated from at least one adjacent plate by a dielectric layer. The first and second electrodes can be exposed at the surface of the substrate and can be coupled to the respective first and second pairs of plates.

Abstract: A method of fabricating a semiconductor assembly can include providing a semiconductor element having a front surface, a rear surface, and a plurality of conductive pads, forming at least one hole extending at least through a respective one of the conductive pads by processing applied to the respective conductive pad from above the front surface, forming an opening extending from the rear surface at least partially through a thickness of the semiconductor element, such that the at least one hole and the opening meet at a location between the front and rear surfaces, and forming at least one conductive element exposed at the rear surface for electrical connection to an external device, the at least one conductive element extending within the at least one hole and at least into the opening, the conductive element being electrically connected with the respective conductive pad.

Abstract: A microelectronic unit can include a substrate having front and rear surfaces and active semiconductor devices therein, the substrate having a plurality of openings arranged in a symmetric or asymmetric distribution across an area of the rear surface, first and second conductive vias connected to first and second pads exposed at the front surface, pluralities of first and second conductive interconnects extending within respective ones of the openings, and first and second conductive contacts exposed for interconnection with an external element. The plurality of first conductive interconnects can be separated from the plurality of second conductive interconnects by at least one of the plurality of openings, the at least one opening at least partially filled with an insulating material. The distribution of the openings can include at least m openings spaced apart in a first direction and n openings spaced apart in a second direction transverse to the first direction.

Abstract: A capacitor can include a substrate having a first surface, a second surface remote from the first surface, and a through opening extending between the first and second surfaces, first and second metal elements, and a capacitor dielectric layer separating and insulating the first and second metal elements from one another at least within the through opening. The first metal element can be exposed at the first surface and can extend into the through opening. The second metal element can be exposed at the second surface and can extend into the through opening. The first and second metal elements can be electrically connectable to first and second electric potentials. The capacitor dielectric layer can have an undulating shape.

Abstract: A component includes a substrate and a capacitor formed in contact with the substrate. The substrate can consist essentially of a material having a coefficient of thermal expansion of less than 10 ppm/° C. The substrate can have a surface and an opening extending downwardly therefrom. The capacitor can include at least first and second pairs of electrically conductive plates and first and second electrodes. The first and second pairs of plates can be connectable with respective first and second electric potentials. The first and second pairs of plates can extend along an inner surface of the opening, each of the plates being separated from at least one adjacent plate by a dielectric layer. The first and second electrodes can be exposed at the surface of the substrate and can be coupled to the respective first and second pairs of plates.

Abstract: A structure including a first semiconductor chip with front and rear surfaces and a cavity in the rear surface. A second semiconductor chip is mounted within the cavity. The first chip may have vias extending from the cavity to the front surface and via conductors within these vias serving to connect the additional microelectronic element to the active elements of the first chip. The structure may have a volume comparable to that of the first chip alone and yet provide the functionality of a multi-chip assembly. A composite chip incorporating a body and a layer of semiconductor material mounted on a front surface of the body similarly may have a cavity extending into the body from the rear surface and may have an additional microelectronic element mounted in such cavity.

Abstract: A microelectronic assembly is provided in which first and second electrically conductive pads exposed at front surfaces of first and second microelectronic elements, respectively, are juxtaposed, each of the microelectronic elements embodying active semiconductor devices. An electrically conductive element may extend within a first opening extending from a rear surface of the first microelectronic element towards the front surface thereof, within a second opening extending from the first opening towards the front surface of the first microelectronic element, and within a third opening extending through at least one of the first and second pads to contact the first and second pads. Interior surfaces of the first and second openings may extend in first and second directions relative to the front surface of the first microelectronic element, respectively, to define a substantial angle.

Abstract: A microelectronic assembly is provided which includes a first element consisting essentially of at least one of semiconductor or inorganic dielectric material having a surface facing and attached to a major surface of a microelectronic element at which a plurality of conductive pads are exposed, the microelectronic element having active semiconductor devices therein. A first opening extends from an exposed surface of the first element towards the surface attached to the microelectronic element, and a second opening extends from the first opening to a first one of the conductive pads, wherein where the first and second openings meet, interior surfaces of the first and second openings extend at different angles relative to the major surface of the microelectronic element. A conductive element extends within the first and second openings and contacts the at least one conductive pad.

Abstract: A method of fabricating a semiconductor assembly can include providing a semiconductor element having a front surface, a rear surface, and a plurality of conductive pads, forming at least one hole extending at least through a respective one of the conductive pads by processing applied to the respective conductive pad from above the front surface, forming an opening extending from the rear surface at least partially through a thickness of the semiconductor element, such that the at least one hole and the opening meet at a location between the front and rear surfaces, and forming at least one conductive element exposed at the rear surface for electrical connection to an external device, the at least one conductive element extending within the at least one hole and at least into the opening, the conductive element being electrically connected with the respective conductive pad.

Abstract: A structure including a first semiconductor chip with front and rear surfaces and a cavity in the rear surface. A second semiconductor chip is mounted within the cavity. The first chip may have vias extending from the cavity to the front surface and via conductors within these vias serving to connect the additional microelectronic element to the active elements of the first chip. The structure may have a volume comparable to that of the first chip alone and yet provide the functionality of a multi-chip assembly. A composite chip incorporating a body and a layer of semiconductor material mounted on a front surface of the body similarly may have a cavity extending into the body from the rear surface and may have an additional microelectronic element mounted in such cavity.

Abstract: A microelectronic unit includes a semiconductor element consisting essentially of semiconductor material and having a front surface, a rear surface, a plurality of active semiconductor devices adjacent the front surface, a plurality of conductive pads exposed at the front surface, and an opening extending through the semiconductor element. At least one of the conductive pads can at least partially overlie the opening and can be electrically connected with at least one of the active semiconductor devices. The microelectronic unit can also include a first conductive element exposed at the rear surface for connection with an external component, the first conductive element extending through the opening and electrically connected with the at least one conductive pad, and a second conductive element extending through the opening and insulated from the first conductive element. The at least one conductive pad can overlie a peripheral edge of the second conductive element.

Abstract: A method of forming a conductive element on a substrate and the resulting assembly are provided. The method includes forming a groove in a sacrificial layer overlying a dielectric region disposed on a substrate. The groove preferably extends along a sloped surface of the substrate. The sacrificial layer is preferably removed by a non-photolithographic method, such as ablating with a laser, mechanical milling, or sandblasting. A conductive element is formed in the groove. The grooves may be formed. The grooves and conductive elements may be formed along any surface of the substrate, including within trenches and vias formed therein, and may connect to conductive pads on the front and/or rear surface of the substrate. The conductive elements are preferably formed by plating and may or may not conform to the surface of the substrate.

Abstract: A capacitor can include a substrate having a first surface, a second surface remote from the first surface, and a through opening extending between the first and second surfaces, first and second metal elements, and a capacitor dielectric layer separating and insulating the first and second metal elements from one another at least within the through opening. The first metal element can be exposed at the first surface and can extend into the through opening. The second metal element can be exposed at the second surface and can extend into the through opening. The first and second metal elements can be electrically connectable to first and second electric potentials. The capacitor dielectric layer can have an undulating shape.

Abstract: Embodiments relate generally to electrical and electronic hardware, computer software, wired and wireless network communications, and computing devices. More specifically, a wearable pod and/or device and processes to form the same facilitate implementation of a touch-sensitive interface in association with a predominately opaque surface. According to an embodiment, a wearable pod includes a first pod cover, a cradle including attachment points, and a touch-sensitive detector disposed in the cradle and configured to detect a change in capacitance to a range of capacitance values. Further, the wearable pod may include a second pod cover and an isolation belt to electrically isolate at least a portion of a pod cover from the other pod cover.

Abstract: A strap band including a flexible wire bus having electrodes and wires coupled with the electrodes is described. The wire bus may be include in a strap band formed by molding an inner strap, mounting the wire bus in the inner strap, and injection molding an outer strap over the inner strap and wire bus to form a strap band. The electrodes may be positioned on the inner strap to accommodate a target range of a body portion the strap band may be worn on. A material of the strap band and a material the wire bus may be selected to allow a low coefficient of friction between the wire bus and strap band so that loads applied to the strap band may not be coupled with the wire bus or cause damage to wires due to pull and/or torsional load forces applied to the strap band.

Abstract: Embodiments relate generally to electrical and electronic hardware, computer software, wired and wireless network communications, and computing devices. More specifically, a wearable pod and/or device and processes to form the same facilitate implementation of a touch-sensitive interface in association with a predominately opaque surface. According to an embodiment, formation of a wearable pod includes detecting a capacitance value at a pod cover portion, determining a mode of operation based on a capacitance value, receiving subsets of sensor data, and selecting a subset of sensor data based on a mode of operation. The method can include determining values of at least one physiological signal and identifying a subset of light sources to emit light through an arrangement of micro-perforations constituting symbols indicative of the values of the physiological signal.

Abstract: Embodiments relate generally to electrical and electronic hardware, computer software, wired and wireless network communications, and computing devices, and, in particular, to a wearable device implementing a touch-sensitive interface in a metal pod cover and/or bioimpedance sensing to determine physiological characteristics, such as heart rate. According to an embodiment, a wearable device includes a selectably opaque surface configured to emit arrangements of light to form a display, and a touch-sensitive I/O control circuit coupled to the selectably opaque surface to detect a capacitance value as an input signal to modify the display. Also, the wearable device can include one or more straps coupled to a wearable pod, at least one of the one or more straps including electrodes for sensing a physiological characteristic. A display controller can be configured to display a representation as a function of a value of the physiological characteristic via the selectably opaque surface.

Abstract: Device-based activity classification using predictive feature analysis is described, including receiving a signal from a sensor coupled to a device, the sensor being configured to sense the signal over a time period, evaluating the signal to generate data, the data being further evaluated to select a classifier, invoking the classifier, the classifier being configured to evaluate a predictive feature, the predictive feature invoking an application configured to determine a state using a feature interpreter, and processing the data using the application and the feature interpreter to generate information associated with a biological state, the information being configured to display on an interface associated with the device.

Abstract: Embodiments relate generally to electrical and electronic hardware, computer software, wired and wireless network communications, and computing devices, and, in particular, to antenna structures and formation methods for a wearable pod and/or device implementing a touch-sensitive interface in a metal pod cover. According to an embodiment, formation of a wearable pod includes selecting an antenna having a first surface area that extends beyond a second surface area associated with an attachment portion a cradle for a wearable pod. The method also includes forming an under-anchor portion composed of an interface material configured to bind to the cradle and to an elastomer, and disposing the antenna on a surface of the under-anchor portion at a distance from the second surface area associated with the attachment portion. Also, the method can include forming an over-anchor portion.

Abstract: Device-based activity classification using predictive feature analysis is described, including receiving a signal from a sensor coupled to a device, the sensor being configured to detect the signal over a time period and to detect motion, evaluating the signal to generate data, the data being used to indicate motion, the data being further evaluated to select a classifier based on whether the motion is detected, activating another sensor coupled to the device, the another sensor being configured to detect another signal that is substantially different than the signal, the another signal being used to generate other data associated with whether the motion is detected, invoking the classifier, the classifier being configured to evaluate a predictive feature to identify a type associated with whether the motion is detected, the predictive feature invoking an application configured to determine the type and a state using a feature interpreter, and processing the data using the application and the feature interpre