Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a carrier substrate, an interposer substrate, a semiconductor device, a lid, and a thermal interface material. The interposer substrate is disposed on the carrier substrate. The semiconductor device is disposed on the interposer substrate. The lid is disposed on the carrier substrate to cover the semiconductor device. The thermal interface material is disposed between the lid and the semiconductor device. A first recess is formed on a lower surface of the lid facing the semiconductor device, and the first recess overlaps the semiconductor device in a top view.

Abstract: In some embodiments, the present disclosure relates to an integrated circuit (IC) in which a memory structure comprises an inhibition layer inserted between two ferroelectric layers to create a tetragonal-phase dominant ferroelectric structure. In some embodiments, the ferroelectric structure includes a first ferroelectric layer, a second ferroelectric layer overlying the first ferroelectric layer, and a first inhibition layer disposed between the first and second ferroelectric layers and bordering the second ferroelectric layer. The first inhibition layer is a different material than the first and second ferroelectric layers.

Abstract: A zoned heat dissipation control system for a water cooling radiator and a water cooling heat dissipation system having the zoned heat dissipation control system includes a plurality of fans, a plurality of heat dissipation zones defined on the water cooling radiator, a thermal detector, and a control unit. At least one of the fans is disposed within each of the heat dissipation zones. The thermal detector is disposed within at least one of the heat dissipation zones and configured to detect the temperature of the water cooling radiator. The control unit is electrically connected to the fans and the thermal detector and configured to modulate the rotational speed of the fan within each of the heat dissipation zones based on the detected data from the thermal detector.

Abstract: Exemplary subpixel structures include a directional light-emitting diode structure characterized by a full-width-half-maximum (FWHM) of emitted light having a divergence angle of less than or about 10°. The subpixel structure further includes a lens positioned a first distance from the light-emitting diode structure, where the lens is shaped to focus the emitted light from the light-emitting diode structure. The subpixel structure still further includes a patterned light absorption barrier positioned a second distance from the lens. The patterned light absorption barrier defines an opening in the barrier, and the focal point of the light focused by the lens is positioned within the opening. The subpixels structures may be incorporated into a pixel structure, and pixel structures may be incorporated into a display that is free of a polarizer layer.

Abstract: A package structure is provided. The package structure includes a first conductive pad in a first insulating layer, a conductive via in a second insulating layer directly under the first conductive pad, and a first under bump metallurgy structure directly under the first conductive via. In a first horizontal direction, the conductive via is narrower than the first under bump metallurgy structure, and the first under bump metallurgy structure is narrower than the first conductive pad.

Abstract: A method for forming a chip package structure. The method includes bonding first connectors over a front surface of a semiconductor wafer. The method also includes dicing the semiconductor wafer from a rear surface of the semiconductor wafer to form semiconductor dies and mounting first and second semiconductor dies in the semiconductor dies over a top surface of the interposer substrate. The method further forming an encapsulating layer over the top surface of the interposer substrate to cover the first semiconductor die and the second semiconductor die. A first sidewall of the first semiconductor die faces a second sidewall of the second semiconductor die, and upper portions of the first sidewall and the second sidewall have a tapered contour, to define a top die-to-die distance and a bottom die-to-die distance that is less than the top die-to-die distance.

Abstract: An automatic lacing mechanism automatically laces between two shoe pieces, and includes a clamping module, a positioning module, a shoelace-running module, and a shoelace-arranging module. The clamping module is adapted to fixedly clamp shoe pieces. The positioning module is adapted to position the shoe pieces prior to the shoe pieces are fixedly clamped, so that the clamping module could firmly clamp the shoe pieces. The shoelace-running module is adapted to run the shoelace through the lace eyelets on the shoe pieces. The shoelace-arranging module is adapted to change the direction of the shoelace during lacing. The positioning module has two positioning pins, wherein a distance therebetween is adjustable, and therefore the positioning module is suitable for the positioning of footwear having different distances between its lace eyelets, which could make the automatic lacing process smoother.

Abstract: An antenna structure includes a metallic member, a feed portion, and a coupling resistor. The metallic member defines a slot, a first gap, a second gap, and a third gap. The first gap and the second gap are connected with the slot and divide with the slot the metallic member into a first portion and a second portion. The second portion is grounded. The third gap is defined on the first portion and connected with the slot. The first portion is divided into a radiating portion and a coupling portion by the third gap. The coupling portion is spaced apart from the radiating portion. The feed portion is electrically connected to the radiating portion, and the coupling portion is grounded through the coupling resistor.

Abstract: An automatic lacing mechanism automatically laces between two shoe pieces, and includes a clamping module, a positioning module, a shoelace-running module, and a shoelace-arranging module. The clamping module is adapted to fixedly clamp shoe pieces. The positioning module is adapted to position the shoe pieces prior to the shoe pieces are fixedly clamped, so that the clamping module could firmly clamp the shoe pieces. The shoelace-running module is adapted to run the shoelace through the lace eyelets on the shoe pieces. The shoelace-arranging module is adapted to change the direction of the shoelace during lacing. The positioning module has two positioning pins, wherein a distance therebetween is adjustable, and therefore the positioning module is suitable for the positioning of footwear having different distances between its lace eyelets, which could make the automatic lacing process smoother.

Abstract: An antenna structure includes a metallic member, a feed portion, and a coupling resistor. The metallic member defines a slot, a first gap, a second gap, and a third gap. The first gap and the second gap are connected with the slot and divide with the slot the metallic member into a first portion and a second portion. The second portion is grounded. The third gap is defined on the first portion and connected with the slot. The first portion is divided into a radiating portion and a coupling portion by the third gap. The coupling portion is spaced apart from the radiating portion. The feed portion is electrically connected to the radiating portion, and the coupling portion is grounded through the coupling resistor.

Abstract: An antenna assembly includes a holder having a first surface and a second surface opposite from the first surface. The antenna assembly defines a number of holes through the first surface and the second surface. A number of connectors are correspondingly received and secured in the holes. The connectors includes an elastic thimble portion on one end. An antenna module is formed on the holder. One end of the connectors connects to the antenna module, while the end with elastic thimble protrudes from the second surface for connecting to a circuit board. A wireless communication device employing the antenna assembly and a method of manufacturing the wireless communication device are also disclosed.

Abstract: An antenna assembly includes a holder having a first surface and a second surface opposite from the first surface. The antenna assembly defines a number of holes through the first surface and the second surface. A number of connectors are correspondingly received and secured in the holes. The connectors includes an elastic thimble portion on one end. An antenna module is formed on the holder. One end of the connectors connects to the antenna module, while the end with elastic thimble protrudes from the second surface for connecting to a circuit board. A wireless communication device employing the antenna assembly and a method of manufacturing the wireless communication device are also disclosed.

Abstract: An operational amplifier circuit structure is provided. The operational amplifier circuit structure includes a first current mirror associated with a first current mirror ratio, a second current mirror coupled to the first current mirror and associated with a second current mirror ratio, an input portion coupled to the first current mirror and the second current mirror, an output portion coupled between the input portion and the first current mirror and the input portion and the second current mirror, and associated with a first output impedance and a second output impedance, respectively, and a current source coupled to the input portion.

Abstract: A method for arranging schedules and a computer using the method are disclosed. The method comprises the steps of: recording a user behavior record in a predetermined time interval; filtering the user behavior record to generate an effective user behavior record; and generating a schedule according to the effective user behavior record.

Abstract: An operational amplifier circuit structure is provided. The operational amplifier circuit structure includes a first current mirror associated with a first current mirror ratio, a second current mirror coupled to the first current mirror and associated with a second current mirror ratio, an input portion coupled to the first current mirror and the second current mirror, an output portion coupled between the input portion and the first current mirror and the input portion and the second current mirror, and associated with a first output impedance and a second output impedance, respectively, and a current source coupled to the input portion.

Abstract: An embedded electronic device is provided. The embedded electronic device comprises a flash memory and a processor. The flash memory comprises a plurality of data storage blocks. The processor performs a parity check process to determine parity data of operation system (OS) data, wherein the parity data serves as a backup for the operation system (OS) data. The processor stores the operation system (OS) data and corresponding parity data into the data storage block of the flash memory.

Abstract: A driving method for generating activating signals that serve to activate scan lines of a display panel includes generating the activating signals based on a plurality of recorded pulse duration information to thereby permit a time point at which a pulse duration of a preceding one of the activating signals in a consecutive pair ends occurs prior to a time point at which a pulse duration of a succeeding one of the activating signals in the consecutive pair starts. A driving device that performs the driving method is also disclosed. A method for adjusting pulse durations of the activating signals is further disclosed.

Abstract: This invention discloses a connector structure including a base, a plurality of metal pins, and a cover. The metal pins are disposed at the base. The cover has a first side and a second side being separately and pivotally connected to the base, respectively. The first side is capable of being operated to be separated from the base and to rotate around the second side for exposing one part of the metal pins. The second side is capable of being operated to be separated from the base and to rotate around the first side for exposing one part of the metal pins.

Abstract: An embedded electronic device is provided. The embedded electronic device comprises a flash memory and a processor. The flash memory comprises a plurality of data storage blocks. The processor performs a parity check process to determine parity data of operation system (OS) data, wherein the parity data serves as a backup for the operation system (OS) data. The processor stores the operation system (OS) data and corresponding parity data into the data storage block of the flash memory.

Abstract: A method for arranging schedules and a computer using the method are disclosed. The method comprises the steps of: recording a user behavior record in a predetermined time interval; filtering the user behavior record to generate an effective user behavior record; and generating a schedule according to the effective user behavior record.