Abstract: A vacuum battery structural assembly and a vacuum multi-cell battery module composed thereof are provided and include a first repeating unit including a first frame plate and a second frame plate with respect to the first frame plate; and an electrolyte channel defined within the first frame plate and the second frame plate to accommodate a liquid electrolyte, wherein both a surface of the first frame plate and a surface of the second frame plate include a vacuum suction area, the vacuum suction area includes a vacuum aperture and a vacuum channel, wherein the vacuum aperture is formed on at least one surface of the first frame plate and the second frame plate, the vacuum channel is positioned inside the first frame plate and the second frame plate, and is configured to generate a longitudinal pressing suction force and seal the first frame plate and the second frame plate.

Abstract: A photographing lens assembly includes, in order from an object side to an image side: a first, a second, a third, a fourth, a fifth and a sixth lens elements. The first lens element with negative refractive power has an object-side surface being concave in a paraxial region thereof, wherein the object-side surface has at least one convex critical point in an off-axis region thereof. The third lens element has an image-side surface being convex in a paraxial region thereof. The fourth lens element has positive refractive power. The fifth lens element with negative refractive power has an object-side surface being concave in a paraxial region thereof, and an image-side surface being convex in a paraxial region thereof. The sixth lens element has an image-side surface being concave in a paraxial region thereof, wherein the image-side surface has at least one convex critical point in an off-axis region thereof.

Abstract: An IC device includes first through third rows of fin field-effect transistors (FinFETs), wherein the second row is between and adjacent to each of the first and third rows, the FinFETs of the first row are one of an n-type or p-type, the FinFETs of the second and third rows are the other of the n-type or p-type, the FinFETs of the first and third rows include a first total number of fins, and the FinFETs of the second row include a second total number of fins one greater or fewer than the first total number of fins.

Abstract: Methods and apparatus for receiving an estimate of L1 iono delay and L1 iono delay rate, receiving GEO slant ionospheric delay, receiving user iono vertical error information for a GEO satellite, and computing a L1/L5 bias estimate from the estimate of L1 iono delay and L1 iono delay rate and GEO slant ionosperic delay. A wide area augmentation system (WAAS) includes L1/L5 bias estimation. The L1/L5 bias is the differential bias between the WAAS GEO satellite L1 and L5 signals. The data used in the L1/L5 bias estimation include the GEO L1 ionospheric delay estimated from a Kalman filter, and the GEO slant ionospheric delay calculated from the Ionospheric Grid Point (IGP) information in a WAAS message. The Sigma User Ionospheric Vertical Error (UIVE) is used as one of the conditions for performing the L1/L5 bias estimation.

Abstract: A system to provide navigation signals to a space vehicle includes an uplink system for a geostationary earth satellite having clock steering derived from smoothed receiver clock error, long term clock error average, and long term clock offset average information. A proportional-integral-differential controller can be used to generate clock adjustment commands to a frequency standard clock.

Abstract: A wide area augmentation system (WAAS) includes L1/L5 bias estimation.

Abstract: In a wide area augmentation system (WAAS), L5 signal code carrier coherency is maintained during GUST initialization and after switchover.

Abstract: A system to provide navigation signals to a space vehicle includes an uplink system for a geostationary earth satellite having clock steering derived from smoothed receiver clock error, long term clock error average, and long term clock offset average information. A proportional-integral-differential controller can be used to generate clock adjustment commands to a frequency standard clock.