Patents by Inventor Po-Shun Huang

Po-Shun Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • BOX ERECTING APPARATUS AND METHOD
    Publication number: 20240157665
    Abstract: An apparatus and method for expanding a box blank into a box, the apparatus comprising an arm assembly, a controller, a camera and a box blank conveyor. The arm assembly includes a folding arm having a position in a first direction and a rotational angle controlled by the controller based on a position of a feature of the box blank in the field of view of the camera. The camera captures images of the box blank which are used to position the arm assembly and to evaluate the need to reject a box blank.
    Type: Application
    Filed: January 17, 2024
    Publication date: May 16, 2024
    Inventors: Szu-Chen HUANG, Po-Hsien CHIU, Mao-Jung CHIU, Mao-Shun LIEN, Fu-Hsien LI
  • Box erecting apparatus and method
    Patent number: 11911991
    Abstract: An apparatus and method for expanding a box blank into a box, the apparatus comprising an arm assembly, a controller, a camera and a box blank conveyor. The arm assembly includes a folding arm having a position in a first direction and a rotational angle controlled by the controller based on a position of a feature of the box blank in the field of view of the camera. The camera captures images of the box blank which are used to position the arm assembly and to evaluate the need to reject a box blank.
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Szu-Chen Huang, Fu-Hsien Li, Mao-Jung Chiu, Mao-Shun Lien, Po-Hsien Chiu
  • Method for forming semiconductor structure
    Patent number: 8211774
    Abstract: The invention provides a method for forming a semiconductor structure. A substrate is provided. A conductive layer is formed on the substrate. A first patterned mask layer is formed on the conductive layer. The conductive layer exposed by the first patterned mask layer is removed to expose a first sidewall of the conductive layer. A doped region is formed in the substrate by a doping step using the first patterned mask layer as a mask. The first patterned mask layer is removed. A second patterned mask layer is formed on the conductive layer. The conductive layer exposed by the second patterned mask layer is removed to expose a second sidewall opposite to the first sidewall of the conductive layer. The second patterned mask layer is removed.
    Type: Grant
    Filed: September 18, 2009
    Date of Patent: July 3, 2012
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Wen-Hsun Lo, Hsing-Chao Liu, Jin-Dong Chern, Po-Shun Huang
  • METHOD FOR FORMING SEMICONDUCTOR STRUCTURE
    Publication number: 20110070709
    Abstract: The invention provides a method for forming a semiconductor structure. A substrate is provided. A conductive layer is formed on the substrate. A first patterned mask layer is formed on the conductive layer. The conductive layer exposed by the first patterned mask layer is removed to expose a first sidewall of the conductive layer. A doped region is formed in the substrate by a doping step using the first patterned mask layer as a mask. The first patterned mask layer is removed. A second patterned mask layer is formed on the conductive layer. The conductive layer exposed by the second patterned mask layer is removed to expose a second sidewall opposite to the first sidewall of the conductive layer. The second patterned mask layer is removed.
    Type: Application
    Filed: September 18, 2009
    Publication date: March 24, 2011
    Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Wen-Hsun Lo, Hsing-Chao Liu, Jin-Dong Chern, Po-Shun Huang