Abstract: A system includes a first amplifier stage and a second amplifier stage. The first amplifier stage is configured to amplify an input signal and generate first output signals. The first amplifier stage includes a common-source differential amplifier. The common-source differential amplifier includes a plurality of metal-oxide semiconductor field-effect transistors (MOSFETs) having source terminals connected to a common potential. The second amplifier stage includes a first differential amplifier and a second differential amplifier configured to respectively generate first and second differential outputs based on the first output signals. Each of the first and second differential amplifiers includes a plurality of MOSFETs having source terminals connected to the common potential via a respective balun.

Abstract: A directional coupler for a wireless communication device includes a first input port, a first output port, a second input port, a second output port, and a coupled port. The first input port and the first output port are respectively configured to receive and provide a first signal to be transmitted from the wireless communication device. The second input port and the second output port are respectively configured to receive and provide a second signal to be transmitted from the wireless communication device. A coupled port is configured to selectively provide a coupled signal corresponding to each of, in respective modes, the first signal and the second signal.

Abstract: An apparatus includes a differential amplifier. The differential amplifier includes a first side circuit configured to receive a first input signal, a second side circuit configured to receive a second input signal, and a resonant tank circuit coupled between the first and second side circuits. A first capacitor and first switch may be provided in series between a source and drain of a cascode transistor. A second capacitor and second switch may be provided in series between a source and drain of an input transistor. A method includes receiving a first input signal by a first side circuit, receiving a second input signal by a second side circuit, controlling a resource of a resonant tank circuit, and outputting an output signal according to the first and second input signals. The resource of the resonant tank circuit may be controlled according to a transmission mode, frequency band, or both.

Abstract: An impedance matching circuit for a wireless communication device includes: a first node that receives a first impedance; a second node that is connected to an antenna having a second impedance; a first variable capacitor that is connected between the first node and a third node; a second variable capacitor that is connected between the third node and a reference potential; a first inductive element that is connected in parallel with the second variable capacitor between the third node and the reference potential; and a third variable capacitor and a second inductive element that are connected in series between the third node and the second node.

Abstract: A circuit including a first die, an integrated passive device and a second layer. The first die includes a first substrate and active devices. The integrated passive device includes a first layer, a second substrate and passive devices. The second substrate includes vias. The passive devices are implemented at least on the first layer or the second substrate. A resistivity per unit area of the second substrate is greater than a resistivity per unit area of the first substrate. The second layer is disposed between the first die and the integrated passive device. The second layer includes pillars. Each of the pillars connects a corresponding one of the active devices to (i) one of the vias, or (ii) one of the passive devices. The first die, the integrated passive device and the second layer are disposed relative to each other to form a stack.

Abstract: A system including a plurality of amplifiers, a plurality of first transmission lines, and a plurality of second transmission lines. The plurality of first transmission lines have first ends respectively connected to outputs of the plurality of amplifiers and second ends connected to a reference potential. The plurality of second transmission lines have first ends connected to a conductor and second ends that are unconnected. Signals output by the plurality of amplifiers to the plurality of first transmission lines are respectively magnetically coupled to the plurality of second transmission lines.

Abstract: A differential power amplifier including a push-pull pair of transistors, a capacitance, a first inductance, and a second inductance. The push-pull pair of transistors includes first and second transistors. The first transistor includes control and output terminals. The second transistor includes input and control terminals. The control terminals of the first and second transistors collectively receive a differential input signal. The output and input terminals collectively provide a differential output signal. The capacitance is connected to the output and input terminals. The first capacitance cancels first harmonics at the output terminal of the first transistor with second harmonics at the input terminal of the second transistor. The first transistor and the first inductance are connected in series between a voltage source and a reference terminal. The second transistor and the second inductance are connected in series between the voltage source and the reference terminal.

Abstract: A circuit including: a die a first substrate and at least one active device; an integrated passive device including a first layer, a second substrate, a second layer and an inductance; and a third layer. The inductance includes vias and is an electrostatic discharge inductance. The vias are implemented in the second substrate. The inductance is implemented on the first layer, the second substrate, and the second layer. A resistivity per unit area of the second substrate is greater than a resistivity per unit area of the first substrate. The third layer is disposed between the die and the integrated passive device. The third layer includes pillars. The pillars respectively connect ends of the inductance to the at least one active device. The die, the integrated passive device and the third layer are disposed relative to each other to form a stack.

Abstract: A system includes a first amplifier stage and a second amplifier stage. The first amplifier stage is configured to amplify an input signal and generate first output signals. The first amplifier stage includes a common-source differential amplifier. The common-source differential amplifier includes a plurality of metal-oxide semiconductor field-effect transistors (MOSFETs) having source terminals connected to a common potential. The second amplifier stage includes a first differential amplifier and a second differential amplifier configured to respectively generate first and second differential outputs based on the first output signals. Each of the first and second differential amplifiers includes a plurality of MOSFETs having source terminals connected to the common potential via a respective balun.

Abstract: A circuit including a die and an integrated passive device. The die includes a first substrate and at least one active device. The integrated passive device includes a first layer, a second substrate, a second layer and an inductance. The inductance includes vias, where the vias are implemented in the second substrate. The inductance is implemented on the first layer, the second substrate, and the second layer. A resistivity per unit area of the second substrate is greater than a resistivity per unit area of the first substrate. The third layer is disposed between the die and the integrated passive device. The third layer includes pillars, where the pillars respectively connect ends of the inductance to the at least one active device. The die, the integrated passive device and the third layer are disposed relative to each other to form a stack.

Abstract: An apparatus includes a differential amplifier. The differential amplifier includes a first side circuit configured to receive a first input signal, a second side circuit configured to receive a second input signal, and a resonant tank circuit coupled between the first and second side circuits. A first capacitor and first switch may be provided in series between a source and drain of a cascode transistor. A second capacitor and second switch may be provided in series between a source and drain of an input transistor. A method includes receiving a first input signal by a first side circuit, receiving a second input signal by a second side circuit, controlling a resource of a resonant tank circuit, and outputting an output signal according to the first and second input signals. The resource of the resonant tank circuit may be controlled according to a transmission mode, frequency band, or both.

Abstract: An impedance matching circuit for a wireless communication device includes: a first node that receives a first impedance; a second node that is connected to an antenna having a second impedance; a first variable capacitor that is connected between the first node and a third node; a second variable capacitor that is connected between the third node and a reference potential; a first inductive element that is connected in parallel with the second variable capacitor between the third node and the reference potential; and a third variable capacitor and a second inductive element that are connected in series between the third node and the second node.

Abstract: A circuit including a first die, an integrated passive device and a second layer. The first die includes a first substrate and active devices. The integrated passive device includes a first layer, a second substrate and passive devices. The second substrate includes vias. The passive devices are implemented at least on the first layer or the second substrate. A resistivity per unit area of the second substrate is greater than a resistivity per unit area of the first substrate. The second layer is disposed between the first die and the integrated passive device. The second layer includes pillars. Each of the pillars connects a corresponding one of the active devices to (i) one of the vias, or (ii) one of the passive devices. The first die, the integrated passive device and the second layer are disposed relative to each other to form a stack.

Abstract: A power amplifier configured to receive an AC input signal and output, based on the AC input signal, an output voltage via a first output voltage terminal and a second output voltage terminal. The power amplifier includes a first transistor and a second transistor connected in a push-pull configuration, a first inductor, a second inductor, and a first capacitor. The first output voltage terminal is located between the first inductor and the first transistor. The second output voltage terminal is located between the second transistor and ground. The first capacitor is configured to provide a first circuit path between the first output voltage terminal and the second output voltage terminal. The first circuit path functions as a short circuit for even harmonics of a fundamental frequency of the AC input signal but does not function as a short circuit for the fundamental frequency of the AC input signal.

Abstract: An amplifier circuit amplifies a signal for wireless transmission. A feedback circuit, including a capacitor, is coupled to the amplifier circuit. Components of the feedback circuit are selected based on a feedback factor such that an input impedance to the amplifier circuit has a same impedance characteristic as a feedback circuit impedance of the feedback circuit.

Abstract: A balun including a first conductor winding, a first inductor, a second inductor, a third inductor, and a fourth inductor. The first conductor winding has a figure eight shape including a first loop and a second loop. The first inductor and the second inductor substantially surround the first loop. The third inductor and the fourth inductor substantially surround the second loop.

Abstract: A power amplifier configured to boost an AC signal. The power amplifier includes a first transistor, a second transistor, a first inductor connected between the first transistor and a voltage source, and a second inductor connected between the second transistor and ground. A first phase conditioner arranged at an input of the first transistor is configured to condition a phase of the AC signal such that the AC signal as received by the first transistor is out of phase with respect to the AC signal as received by the first inductor. A second phase conditioner arranged at an input of the second transistor is configured to condition a phase of the AC signal such that the AC signal as received by the second transistor is out of phase with respect to the AC signal as received by the second inductor.

Abstract: Different scan modes are provided for Bluetooth devices. In at least some embodiments, a narrowband scanning mode looks for signal energy on individual transmission frequencies at a time. By looking for signal energy rather than decoding transmitted packets, at least some of the components in a Bluetooth device can remain in an idle or rest state. A midband scanning mode looks for signal energy across multiple different frequencies at a time. Again, by looking for signal energy across multiple different frequencies rather than decoding transmitted packets, at least some of the components in a Bluetooth device can remain in an idle or rest state. A wideband scanning mode looks for signal energies across all relevant frequencies at a time. At least some embodiments enable a Bluetooth device to switch between scanning modes.

Abstract: A method of reducing stress in a cascode common-source amplifier including a first transistor and a second transistor connected in a cascode arrangement. The method includes providing an input voltage and a bias voltage to the first transistor and the second transistor, respectively, connected in the cascode arrangement, generating, based on the input voltage and the bias voltage, an output current, and equalizing stress associated with operation of each of the first transistor and the second transistor. Equalizing the stress includes, in response to the input voltage decreasing by an amount sufficient to cause the first transistor and the second transistor to turn off, equalizing respective voltage drops across the first transistor and the second transistor.

Abstract: A balun including a first conductor winding, a first inductor, a second inductor, a third inductor, and a fourth inductor. The first conductor winding has a figure eight shape including a first loop and a second loop. The first inductor and the second inductor substantially surround the first loop. The third inductor and the fourth inductor substantially surround the second loop.