Patents by Inventor Ponnusamy Palanisamy

Ponnusamy Palanisamy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030209977
    Abstract: A display having improved thermal management and a method for producing the display are disclosed. The display includes a pixel structure adjacent a front panel with thermo-mechanical elements extending between a back panel and the pixel structure to dissipate heat generated by the pixel structure.
    Type: Application
    Filed: May 12, 2003
    Publication date: November 13, 2003
    Inventor: Ponnusamy Palanisamy
  • Publication number: 20030132702
    Abstract: Organic light emitting material may be effectively passivated in organic light emitting device display manufacture by selectively applying an organic passivation material to the recently deposited organic light emitting material. By a selective deposition process, other areas of the display need not be immediately passivated. As a result, contact areas (and other areas which should not be passivated) may remain unpassivated during the manufacturing process. By using organic passivity materials, incompatibilities between the organic light material and the passivation material may be reduced. In many cases, it may be desirable to limit the temperatures that are applied during the curing process. In one embodiment, ultraviolet curing may be utilized.
    Type: Application
    Filed: January 30, 2003
    Publication date: July 17, 2003
    Inventors: Ponnusamy Palanisamy, James R. Demarco
  • Publication number: 20030082434
    Abstract: Solid oxide fuel cells made by coating a slurry of an electrolyte having a limited amount of organic material onto a carrier tape, depositing a one or two layer electrode material on the tape sufficient to support the electrolyte layer, removing the tape, screen printing a second electrode layer on the exposed surface of the electrolyte layer, and firing the layers at a temperature of 1100-1300° C. The resultant fired fuel cell can be mounted on an interconnector comprising a base plate, grooves formed in one face of the base plate, a porous conductive ceramic contact layer between the base plate and an overlying blocking layer of a porous conductive layer to provide electrical contact between the base plate and the blocking layer, or an interconnector having a fired green tape stack having conductive via contacts and air and gas flow channels formed therein. A sealing glass bonds the overlying layers to the base plate.
    Type: Application
    Filed: May 30, 2002
    Publication date: May 1, 2003
    Inventors: Conghua Wang, Ponnusamy Palanisamy, Mark Stuart Hammond, Barry Jay Thaler
  • Publication number: 20030057565
    Abstract: A non-planar surface may be surface mounted to another surface using solder balls that may be modified to generate a planar surface for receiving the second surface. In one embodiment, the solder balls may be secured to an irregular surface and then scrapped to form a planar contacting surface. A second surface to be bonded to the first surface may then be attached to the planar contacting surface and the solder balls reflowed to create a surface mount.
    Type: Application
    Filed: October 31, 2002
    Publication date: March 27, 2003
    Inventors: Ponnusamy Palanisamy, James R. Demarco
  • Patent number: 6527159
    Abstract: Surface mount technology may be utilized to join two surfaces together that may include relative surface irregularities. By varying the volume of surface mount material applied to electrically and physically join the two surfaces, surface-to-surface irregularities may be compensated for. Various techniques may be utilized to vary the volume of the interconnection material in a high speed fashion.
    Type: Grant
    Filed: July 12, 2001
    Date of Patent: March 4, 2003
    Assignee: Intel Corporation
    Inventors: Dennis L. Matthies, Ponnusamy Palanisamy
  • Publication number: 20030034564
    Abstract: Integrated packages incorporating multilayer ceramic circuit boards mounted on a metal support substrate can be used for temperature control by the metal support substrate. Various electronic components, as well as additional temperature control devices, can be connected to the circuit boards and to the metal support substrate to control or regulate the temperature of operation of the components. The integrated package can be hermetically sealed with a lid.
    Type: Application
    Filed: July 19, 2002
    Publication date: February 20, 2003
    Inventors: Ponnusamy Palanisamy, Attiganal Narayanaswamysreeram, Ellen Schwartz Tormey, Barry Jay Thaler, John Connolly, Ramon Ubaldo Martinelli, Ashok Narayan Prabhu, Mark Stuart Hammond, Joseph Mazzochette
  • Patent number: 6512301
    Abstract: A non-planar surface may be surface mounted to another surface using solder balls that may be modified to generate a planar surface for receiving the second surface. In one embodiment, the solder balls may be secured to an irregular surface and then scrapped to form a planar contacting surface. A second surface to be bonded to the first surface may then be attached to the planar contacting surface and the solder balls reflowed to create a surface mount.
    Type: Grant
    Filed: July 12, 2001
    Date of Patent: January 28, 2003
    Assignee: Intel Corporation
    Inventors: Ponnusamy Palanisamy, James R. Demarco
  • Publication number: 20030013286
    Abstract: A non-planar surface may be surface mounted to another surface using solder balls that may be modified to generate a planar surface for receiving the second surface. In one embodiment, the solder balls may be secured to an irregular surface and then scrapped to form a planar contacting surface. A second surface to be bonded to the first surface may then be attached to the planar contacting surface and the solder balls reflowed to create a surface mount.
    Type: Application
    Filed: July 12, 2001
    Publication date: January 16, 2003
    Inventors: Ponnusamy Palanisamy, James R. Demarco
  • Publication number: 20030011298
    Abstract: A display made from a display panel and a circuit board that are surface mounted to one another. The surface mount interconnections may be distributed across the display avoiding the need to situate the contacts around the periphery. Particularly, in large area displays made up of a plurality of abutting displays, making interconnections in the peripheral areas may be disadvantageous. The row and column contacts may be redundant to improve the yield and life time of the display. Contacts adjacent edges may be displaced into available space, spaced away from the edges.
    Type: Application
    Filed: July 12, 2001
    Publication date: January 16, 2003
    Inventor: Ponnusamy Palanisamy
  • Publication number: 20030011302
    Abstract: An electronic device having an extensive narrow passageway may be effectively encapsulated by forming openings in one or more of the surfaces defining the encapsulation region. Encapsulation material may then be injected through these openings to fill a narrow, difficult to access region between two surfaces being encapsulated. In some cases, the encapsulant may be applied progressively, starting with a central port and applying the encapsulant in a radially expanding front through radially displaced ports.
    Type: Application
    Filed: July 12, 2001
    Publication date: January 16, 2003
    Inventor: Ponnusamy Palanisamy
  • Publication number: 20030011300
    Abstract: Organic light emitting material may be effectively passivated in organic light emitting device display manufacture by selectively applying an organic passivation material to the recently deposited organic light emitting material. By a selective deposition process, other areas of the display need not be immediately passivated. As a result, contact areas (and other areas which should not be passivated) may remain unpassivated during the manufacturing process. By using organic passivity materials, incompatibilities between the organic light material and the passivation material may be reduced. In many cases, it may be desirable to limit the temperatures that are applied during the curing process. In one embodiment, ultraviolet curing may be utilized.
    Type: Application
    Filed: July 12, 2001
    Publication date: January 16, 2003
    Inventors: Ponnusamy Palanisamy, James R. Demarco
  • Publication number: 20030010807
    Abstract: Surface mount technology may be utilized to join two surfaces together that may include relative surface irregularities. By varying the volume of surface mount material applied to electrically and physically join the two surfaces, surface-to-surface irregularities may be compensated for. Various techniques may be utilized to vary the volume of the interconnection material in a high speed fashion.
    Type: Application
    Filed: July 12, 2001
    Publication date: January 16, 2003
    Inventors: Dennis L. Matthies, Ponnusamy Palanisamy
  • Publication number: 20020090102
    Abstract: A hearing aid microphone module housing all the electronic components needed for a functional hearing aid other than the battery and receiver is described which uses flip-chip technology to couple a JFET buffer to the components. The buffer is disposed on a PCB which defines a back volume of the housing.
    Type: Application
    Filed: January 29, 2002
    Publication date: July 11, 2002
    Applicant: Sarnoff Corporation
    Inventors: Peter Madaffari, Walter P. Sjursen, Christopher Poux, Richard Moroney, Ponnusamy Palanisamy
  • Patent number: 6366678
    Abstract: A hearing aid microphone module housing all the electronic components needed for a functional hearing aid other than the battery and receiver is described which uses flip-chip technology to couple a JFET buffer to the components. The buffer is disposed on a PCB which defines a back volume of the housing.
    Type: Grant
    Filed: January 6, 2000
    Date of Patent: April 2, 2002
    Assignees: Sarnoff Corporation, Tibbetts Industries, Inc.
    Inventors: Peter Madaffari, Walter P. Sjursen, Christopher Poux, Richard Moroney, Ponnusamy Palanisamy
  • Patent number: 5395679
    Abstract: Disclosed is an ultra-thick thick film of copper or silver or other suitable conductor material for use in spreading heat laterally, i.e., in the x and y directions, along a substrate. A substrate of suitable thickness is chosen to dissipate heat in the vertical or z-direction underneath a heat generating component such as a semiconductor chip. The ultra-thick films have a thickness ranging from about 2 to about 5 mils and are prepared from metal powders having average particles sizes ranging from about 1 micron to 3 microns.
    Type: Grant
    Filed: March 29, 1993
    Date of Patent: March 7, 1995
    Assignee: Delco Electronics Corp.
    Inventors: Bruce A. Myers, Dwadasi H. R. Sarma, Anil K. Kollipara, Ponnusamy Palanisamy
  • Patent number: 5176853
    Abstract: Compositions useful for printing controllable adhesion conductive patterns on a printed circuit board include finely divided copper powder, a screening agent and a binder. The binder is designed to provide controllable adhesion of the copper layer formed after sintering to the substrate so that the layer can lift off the substrate in response to thermal stress. Additionally, the binder serves to promote good cohesion between the copper particles to provide good mechanical strength to the copper layer so that it can tolerate lift off without fracture.
    Type: Grant
    Filed: January 17, 1989
    Date of Patent: January 5, 1993
    Assignee: Delco Electronics Corporation
    Inventors: Dwadasi H. R. Sarma, Ponnusamy Palanisamy, John A. Hearn, Dwight L. Schwarz
  • Patent number: 5169679
    Abstract: A printed circuit board includes both high and low resistive value thick film resistors interconnected by a copper film. To lower the contact resistance to the thick film resistors of high value, each is provided at its ends with a termination of a composition similar to that used for the low value resistors. This provides a relatively low resistance contact region which overcomes the difficulty that a copper thick film conductor has in making electrical connections to compositions generally used for making high value thick film resistors. The composition of high and low resistivities are adapted to permit firing of both compositions in a single firing step.
    Type: Grant
    Filed: October 11, 1988
    Date of Patent: December 8, 1992
    Assignee: Delco Electronics Corporation
    Inventor: Ponnusamy Palanisamy
  • Patent number: 5164698
    Abstract: A printed circuit board includes both high and low resistive value thick film resistors interconnected by a copper film. To lower the contact resistance to the thick film resistors of high value, each is provided at its ends with a termination of a composition similar to that used for the low value resistors. This provides a relatively low resistance contact region which overcomes the difficulty that a copper thick film conductor has in making electrical connections to compositions generally used for making high value thick film resistors. The composition of high and low resistivities are adapted to permit firing of both compositions in a single firing step.
    Type: Grant
    Filed: July 1, 1991
    Date of Patent: November 17, 1992
    Assignee: Delco Electronics Corporation
    Inventor: Ponnusamy Palanisamy
  • Patent number: 5151777
    Abstract: An interface device for thermally coupling an integrated circuit to a heat sink having a first material characterized by high thermal conductivity such as copper, where the copper completely surrounds a plurality of inner core regions. The plurality of inner core regions contain a low coefficient of thermal expansion material and are primarily disposed in the copper material in the region directly under the integrated circuit. The low expansion regions retard thermal expansion of the interface device during exposure to variations in the temperature, yet there are continuous paths of copper provided between the integrated circuit and heat sink to promote efficient heat transfer between the silicon chip to the heat sink through the high conductivity copper. In addition, high thermal resistance layers are provided for dielectric isolation between an integrated circuit chip and heat sink, when necessary, using this invention.
    Type: Grant
    Filed: October 16, 1989
    Date of Patent: September 29, 1992
    Assignee: Delco Electronics Corporation
    Inventors: Timur Akin, Bruce A. Myers, William M. Maki, Ponnusamy Palanisamy
  • Patent number: 5122929
    Abstract: A technique for providing controlled adhesion of a portion of a printed conductor to a circuit board employs an inhibitor layer between the circuit board and the portion of the printed conductor where such controlled adhesion is desired. The inhibitor layer is formed using a mixture of finely divided alumina powder and a glass frit, which are both suspended in an organic screening agent. An electrical module connected between controllably adherent conductor portions is thereby able to move to relative mechanical stresses.
    Type: Grant
    Filed: January 17, 1989
    Date of Patent: June 16, 1992
    Assignee: Delco Electronics Corporation
    Inventors: Ponnusamy Palanisamy, Dwadasi H. R. Sarma, John A. Hearn, Dwight L. Schwarz