Abstract: A word line voltage regulation circuit includes a first comparator for comparing a first reference voltage and the potential of an output node; a first switching element for supplying the supply voltage to the output node depending on the output signal of the first comparator; a second comparator for comparing a second reference voltage and the potential of the output node; a second switching element for regulating the potential of the output node depending on the output signal of the second comparator; a third switching element for transmitting the potential of the output node to a decoder circuit depending on a first control signal; and a fourth switching element for supplying the supply voltage to the decoder circuit depending on a second control signal.

Abstract: A method of erasing a flash memory according to the present invention includes the steps of: performing a first loop erasing operation so that a source electrode is floated, a program gate electrode is applied with a negative voltage and a drain electrode is supplied with an initial erasing voltage; and performing a second loop erasing operation so that the source electrode is floated, the program gate electrode is applied with the negative voltage and the drain electrode is supplied with a normal erasing voltage higher than the initial erasing voltage.

Abstract: A flash memory device according to this invention comprises a main cell array block consisted of a main cell array and a dummy cell array; a first and second multiplex blocks to which data of the main cell array are input; a first and second column multiplex blocks to which data of the main cell array block are input; a first and second repair multiplexers to control the first and second multiplex blocks; a third to fifth repair multiplexers to control the first and second column multiplex blocks; a first to fifth decoders to access said main cell array of the cell array block according to an address input; a sixth and seventh decoders to access repair cell array of the cell array block according to the address input; and a redundancy fuse block comparing the inputted address with repair address and determining whether repair be done or not.