Patents by Inventor Pradeep Ramachandran

Pradeep Ramachandran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240153062
    Abstract: A method of predicting virtual metrology data for a wafer lot that includes receiving first image data from an imager system, the first image data relating to at least one first wafer lot, receiving measured metrology data from metrology equipment relating to the at least one first wafer lot, applying one or more machine learning techniques to the first image data and the measured metrology data to generate at least one predictive model for predicting at least one of virtual metrology data or virtual cell metrics data of wafer lots, and utilizing the at least one generated predictive model to generate at least one of first virtual metrology data or first virtual cell metrics data for the first wafer lot.
    Type: Application
    Filed: January 8, 2024
    Publication date: May 9, 2024
    Inventors: Amitava Majumdar, Qianlan Liu, Pradeep Ramachandran, Shawn D. Lyonsmith, Steve K. McCandless, Ted L. Taylor, Ahmed N. Noemaun, Gordon A. Haller
  • Publication number: 20240087438
    Abstract: Static data that represents one or more static contributing factors to a dynamic threat-level index is received for a corresponding local region and live data that represents one or more dynamic contributing factors to the dynamic threat-level index for the corresponding local region is repeatedly received. An updated dynamic threat-level index for the corresponding local region is repeatedly determined based at least in part on a previously determined updated dynamic threat-level index for the corresponding local region, at least some of the received static data for the corresponding local region, and at least some of the received live data for the corresponding local region. A dashboard is displayed that dynamically shows the updated dynamic threat-level index for each of at least some of the plurality of local regions.
    Type: Application
    Filed: September 12, 2022
    Publication date: March 14, 2024
    Inventors: Pradeep Kumar Shanmugavelu, Vivek Ramachandran, Sivakumar Mahadevan, Srinivas C
  • Patent number: 11869178
    Abstract: A method of predicting virtual metrology data for a wafer lot that includes receiving first image data from an imager system, the first image data relating to at least one first wafer lot, receiving measured metrology data from metrology equipment relating to the at least one first wafer lot, applying one or more machine learning techniques to the first image data and the measured metrology data to generate at least one predictive model for predicting at least one of virtual metrology data or virtual cell metrics data of wafer lots, and utilizing the at least one generated predictive model to generate at least one of first virtual metrology data or first virtual cell metrics data for the first wafer lot.
    Type: Grant
    Filed: December 10, 2020
    Date of Patent: January 9, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Amitava Majumdar, Qianlan Liu, Pradeep Ramachandran, Shawn D. Lyonsmith, Steve K. McCandless, Ted L. Taylor, Ahmed N. Noemaun, Gordon A. Haller
  • Publication number: 20210090246
    Abstract: A method of predicting virtual metrology data for a wafer lot that includes receiving first image data from an imager system, the first image data relating to at least one first wafer lot, receiving measured metrology data from metrology equipment relating to the at least one first wafer lot, applying one or more machine learning techniques to the first image data and the measured metrology data to generate at least one predictive model for predicting at least one of virtual metrology data or virtual cell metrics data of wafer lots, and utilizing the at least one generated predictive model to generate at least one of first virtual metrology data or first virtual cell metrics data for the first wafer lot.
    Type: Application
    Filed: December 10, 2020
    Publication date: March 25, 2021
    Inventors: Amitava Majumdar, Qianlan Liu, Pradeep Ramachandran, Shawn D. Lyonsmith, Steve K. McCandless, Ted L. Taylor, Ahmed N. Noemaun, Gordon A. Haller
  • Patent number: 10872403
    Abstract: A method of predicting virtual metrology data for a wafer lot that includes receiving first image data from an imager system, the first image data relating to at least one first wafer lot, receiving measured metrology data from metrology equipment relating to the at least one first wafer lot, applying one or more machine learning techniques to the first image data and the measured metrology data to generate at least one predictive model for predicting at least one of virtual metrology data or virtual cell metrics data of wafer lots, and utilizing the at least one generated predictive model to generate at least one of first virtual metrology data or first virtual cell metrics data for the first wafer lot.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: December 22, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Amitava Majumdar, Qianlan Liu, Pradeep Ramachandran, Shawn D. Lyonsmith, Steve K. McCandless, Ted L. Taylor, Ahmed N. Noemaun, Gordon A. Haller
  • Publication number: 20200051235
    Abstract: A method of predicting virtual metrology data for a wafer lot that includes receiving first image data from an imager system, the first image data relating to at least one first wafer lot, receiving measured metrology data from metrology equipment relating to the at least one first wafer lot, applying one or more machine learning techniques to the first image data and the measured metrology data to generate at least one predictive model for predicting at least one of virtual metrology data or virtual cell metrics data of wafer lots, and utilizing the at least one generated predictive model to generate at least one of first virtual metrology data or first virtual cell metrics data for the first wafer lot.
    Type: Application
    Filed: August 10, 2018
    Publication date: February 13, 2020
    Inventors: Amitava Majumdar, Qianlan Liu, Pradeep Ramachandran, Shawn D. Lyonsmith, Steve K. McCandless, Ted L. Taylor, Ahmed N. Noemaun, Gordon A. Haller
  • Patent number: 9767041
    Abstract: Apparatus, systems, and methods to manage memory operations are described. In one example, a controller comprises logic to receive a first transaction to operate on a first data element in the cache memory, perform a lookup operation for the first data element in the volatile memory and in response to a failed lookup operation, to generate a cache scrub hint forward the cache scrub hint to a cache scrub engine and identify one or more cache lines to scrub based at least in part on the cache scrub hint. Other examples are also disclosed and claimed.
    Type: Grant
    Filed: May 26, 2015
    Date of Patent: September 19, 2017
    Assignee: Intel Corporation
    Inventors: Aravindh V. Anantaraman, Zvika Greenfield, Israel Diamand, Anant V. Nori, Pradeep Ramachandran, Nir Misgav
  • Publication number: 20160350237
    Abstract: Apparatus, systems, and methods to manage memory operations are described. In one example, a controller comprises logic to receive a first transaction to operate on a first data element in the cache memory, perform a lookup operation for the first data element in the volatile memory and in response to a failed lookup operation, to generate a cache scrub hint forward the cache scrub hint to a cache scrub engine and identify one or more cache lines to scrub based at least in part on the cache scrub hint. Other examples are also disclosed and claimed.
    Type: Application
    Filed: May 26, 2015
    Publication date: December 1, 2016
    Applicant: Intel Corporation
    Inventors: Aravindh V. Anantaraman, Zvika Greenfield, Israel Diamand, Anant V. Nori, Pradeep Ramachandran, Nir Misgav
  • Publication number: 20160179387
    Abstract: A processor includes an execution unit, a memory subsystem, and a memory management unit (MMU). The MMU includes logic to evaluate a first bandwidth usage of the memory subsystem and logic to evaluate a second bandwidth usage between the processor and a memory. The memory is communicatively coupled to the memory subsystem. The memory subsystem is to implement a cache for the memory. The MMU further includes logic to evaluate a request of the memory subsystem, and, based upon the first bandwidth usage and the second bandwidth usage, fulfill the request by bypassing the memory subsystem.
    Type: Application
    Filed: December 16, 2015
    Publication date: June 23, 2016
    Inventors: Jayesh Gaur, Prasanna Rengasamy, Pradeep Ramachandran, Sreenivas Subramoney
  • Publication number: 20080280776
    Abstract: Apparatus and methods for detecting molecules in a fluidic environment are provided, including nanodevices and methods for fabricating, functionalizing, and operating such nanodevices. At least one of the methods includes selective heating of nanodevices in an array.
    Type: Application
    Filed: December 4, 2007
    Publication date: November 13, 2008
    Inventors: Rashid Bashir, Oguz Elibol, Pradeep Ramachandran Nair, Donald Bergstrom, Ashraf Alam, Bobby Reddy, JR.