Patents by Inventor Prakash Chimanlal Dev

Prakash Chimanlal Dev has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6740539
    Abstract: A structure and method for an insulator layer having carbon-graded layers above a substrate is disclosed, wherein the concentration of carbon increases in each successive carbon-graded layer above the substrate. The insulator comprises a low-k dielectric having a dielectric constant less than 3.3. The carbon-graded layer increases adhesion between the substrate and the insulator and between the insulator and the conductor layer. The structure may also include stabilization interfaces between the carbon-graded layers. More specifically, the carbon-graded layers include a first layer adjacent the substrate having a carbon content between about 5% and 20%, a second layer above the first layer having a carbon content between about 10% and 30%, and a third layer above the second layer having a carbon content between about 20% and 40%.
    Type: Grant
    Filed: February 13, 2003
    Date of Patent: May 25, 2004
    Assignees: International Business Machines Corporation, Infineon Technologies A.G.
    Inventors: Richard A. Conti, Prakash Chimanlal Dev, David M. Dobuzinsky, Daniel C. Edelstein, Gill Y. Lee, Kia-Seng Low, Padraic C. Shafer, Alexander Simpson, Peter Wrschka
  • Patent number: 6649531
    Abstract: A process for forming a damascene structure includes depositing a bilayer comprising a first dielectric layer and a second dielectric layer onto a substrate, wherein the first layer has a dielectric constant higher than the second layer, and wherein the second layer is selected from a low k dielectric material comprising Si, C, O and H. The multi-step damascene structure is patterned into the dielectric bilayer using highly selective anisotropic reactive ion etching. Photoresist, polymers and post etch residues are removed from the substrate using a plasma ashing process without damaging the underlying dielectric layers.
    Type: Grant
    Filed: November 26, 2001
    Date of Patent: November 18, 2003
    Assignee: International Business Machines Corporation
    Inventors: William J. Cote, Timothy J. Dalton, Prakash Chimanlal Dev, Daniel C. Edelstein, Scott D. Halle, Gill Yong Lee, Arpan P. Mahorowala
  • Publication number: 20030153198
    Abstract: A structure and method for an insulator layer having carbon-graded layers above a substrate is disclosed, wherein the concentration of carbon increases in each successive carbon-graded layer above the substrate. The insulator comprises a low-k dielectric having a dielectric constant less than 3.3. The carbon-graded layer increases adhesion between the substrate and the insulator and between the insulator and the conductor layer. The structure may also include stabilization interfaces between the carbon-graded layers. More specifically, the carbon-graded layers include a first layer adjacent the substrate having a carbon content between about 5% and 20%, a second layer above the first layer having a carbon content between about 10% and 30%, and a third layer above the second layer having a carbon content between about 20% and 40%.
    Type: Application
    Filed: February 13, 2003
    Publication date: August 14, 2003
    Inventors: Richard A. Conti, Prakash Chimanlal Dev, David M. Dobuzinsky, Daniel C. Edelstein, Gill Y. Lee, Kia-Seng Low, Padraic C. Shafer, Alexander Simpson, Peter Wrschka
  • Publication number: 20030100190
    Abstract: A process for forming a damascene structure includes depositing a bilayer comprising a first dielectric layer and a second dielectric layer onto a substrate, wherein the first layer has a dielectric constant higher than the second layer, and wherein the second layer is selected from a low k dielectric material comprising Si, C, O and H. The multi-step damascene structure is patterned into the dielectric bilayer using highly selective anisotropic reactive ion etching. Photoresist, polymers and post etch residues are removed from the substrate using a plasma ashing process without damaging the underlying dielectric layers.
    Type: Application
    Filed: November 26, 2001
    Publication date: May 29, 2003
    Applicant: International Business Machines Corporation
    Inventors: William J. Cote, Timothy J. Dalton, Prakash Chimanlal Dev, Daniel C. Edelstein, Scott D. Halle, Gill Yong Lee, Arpan P. Mahorowala
  • Patent number: 6570256
    Abstract: A structure and method for an insulator layer having carbon-graded layers above a substrate is disclosed, wherein the concentration of carbon increases in each successive carbon-graded layer above the substrate. The insulator comprises a low-k dielectric having a dielectric constant less than 3.3. The carbon-graded layer increases adhesion between the substrate and the insulator and between the insulator and the conductor layer. The structure may also include stabilization interfaces between the carbon-graded layers. More specifically, the carbon-graded layers include a first layer adjacent the substrate having a carbon content between about 5% and 20%, a second layer above the first layer having a carbon content between about 10% and 30%, and a third layer above the second layer having a carbon content between about 20% and 40%.
    Type: Grant
    Filed: July 20, 2001
    Date of Patent: May 27, 2003
    Assignee: International Business Machines Corporation
    Inventors: Richard A. Conti, Prakash Chimanlal Dev, David M. Dobuzinsky, Daniel C. Edelstein, Gill Y. Lee, Kia-Seng Low, Padraic C. Shafer, Alexander Simpson, Peter Wrschka
  • Publication number: 20030017642
    Abstract: A structure and method for an insulator layer having carbon-graded layers above a substrate is disclosed, wherein the concentration of carbon increases in each successive carbon-graded layer above the substrate. The insulator comprises a low-k dielectric having a dielectric constant less than 3.3. The carbon-graded layer increases adhesion between the substrate and the insulator and between the insulator and the conductor layer. The structure may also include stabilization interfaces between the carbon-graded layers. More specifically, the carbon-graded layers include a first layer adjacent the substrate having a carbon content between about 5% and 20%, a second layer above the first layer having a carbon content between about 10% and 30%, and a third layer above the second layer having a carbon content between about 20% and 40%.
    Type: Application
    Filed: July 20, 2001
    Publication date: January 23, 2003
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Richard A. Conti, Prakash Chimanlal Dev, David M. Dobuzinsky, Daniel C. Edelstein, Gill Y. Lee, Kia-Seng Low, Padraic C. Shafer, Alexander Simpson, Peter Wrschka