Patents by Inventor PRAKASH LAKSHMIKANTHAN

PRAKASH LAKSHMIKANTHAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Run-to-run control for chemical mechanical planarization
    Patent number: 10500693
    Abstract: A method for fabricating an integrated circuit includes providing a partitioned chemical-mechanical planarization (CMP) model having a plurality of model parameters that include (i) device specific model parameters and (ii) at least one common parameter. (i) include a pre-CMP thickness of a film including a first material on an in-process device, a post-CMP target thickness for the film on the in-process device, and device group properties that account for device structure for the in-process device. (ii) includes a polish rate from an unpatterned pilot wafer having a second material thereon. The second material need not be the same as the first material. The polish time is automatically determined using the partitioned CMP model. A CMP process is performed on a patterned product wafer having a plurality of the in-process devices using a recipe including the polish time.
    Type: Grant
    Filed: April 5, 2012
    Date of Patent: December 10, 2019
    Assignee: Texas Instruments Incorporated
    Inventors: Madhu Sudan Ramavajjala, Prakash Lakshmikanthan, Patrick David Noll
  • PERMEATED GROOVING IN CMP POLISHING PADS
    Publication number: 20160101501
    Abstract: A polishing pad for polishing a semiconductor wafer or other materials, having grooves in the polishing pad to enhance the usable lifetime of the polishing pad.
    Type: Application
    Filed: December 18, 2015
    Publication date: April 14, 2016
    Inventors: Christopher Lee Schutte, Prakash Lakshmikanthan
  • Permeated grooving in CMP polishing pads
    Patent number: 9308620
    Abstract: A polishing pad for polishing a semiconductor wafer or other materials, having grooves in the polishing pad to enhance the usable lifetime of the polishing pad.
    Type: Grant
    Filed: September 18, 2013
    Date of Patent: April 12, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Christopher Lee Schutte, Prakash Lakshmikanthan
  • PERMEATED GROOVING IN CMP POLISHING PADS
    Publication number: 20150079886
    Abstract: A polishing pad for polishing a semiconductor wafer or other materials, having grooves in the polishing pad to enhance the usable lifetime of the polishing pad.
    Type: Application
    Filed: September 18, 2013
    Publication date: March 19, 2015
    Applicant: Texas Instruments Incorporated
    Inventors: Christopher Lee Schutte, Prakash Lakshmikanthan
  • RUN-TO-RUN CONTROL FOR CHEMICAL MECHANICAL PLANARIZATION
    Publication number: 20130267148
    Abstract: A method for fabricating an integrated circuit includes providing a partitioned chemical-mechanical planarization (CMP) model having a plurality of model parameters that include (i) device specific model parameters and (ii) at least one common parameter. (i) include a pre-CMP thickness of a film including a first material on an in-process device, a post-CMP target thickness for the film on the in-process device, and device group properties that account for device structure for the in-process device. (ii) includes a polish rate from an unpatterned pilot wafer having a second material thereon. The second material need not be the same as the first material. The polish time is automatically determined using the partitioned CMP model. A CMP process is performed on a patterned product wafer having a plurality of the in-process devices using a recipe including the polish time.
    Type: Application
    Filed: April 5, 2012
    Publication date: October 10, 2013
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: MADHU SUDAN RAMAVAJJALA, PRAKASH LAKSHMIKANTHAN, PATRICK DAVID NOLL