Patents by Inventor Pranav Devalla

Pranav Devalla has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Linecard system using riser printed circuit boards (PCBS)
    Patent number: 11737204
    Abstract: A network device having improved thermal cooling is provided. The network device includes a first printed circuit board (PCB) having a plurality of common connectors and one or more second PCBs, each second PCB coupled to the first PCB by a respective common connector of the plurality of common connectors. Each second PCB may include a set of ports, each port in the set of ports coupled to the respective common connector via the second PCB. The one or more second PCBs may be arranged vertically parallel on a front side of the first PCB such that each second PCB forms a 90 degree angle with the first PCB to allow air to flow in spaces defined between vertically adjacent second PCBs.
    Type: Grant
    Filed: January 19, 2022
    Date of Patent: August 22, 2023
    Assignee: ARISTA NETWORKS, INC.
    Inventors: Pranav Devalla, Harold Wang, Prasad Venugopal, Aravind Musunuri
  • LINECARD SYSTEM USING RISER PRINTED CIRCUIT BOARDS (PCBS)
    Publication number: 20220141949
    Abstract: A network device having improved thermal cooling is provided. The network device comprising a first printed circuit board (PCB) having a plurality of common connectors and one or more second PCBs, each second PCB coupled to the first PCB by a respective common connector of the plurality of common connectors. Each second PCB may include a set of ports, each port in the set of ports coupled to the respective common connector via the second PCB. The one or more second PCBs may be arranged vertically parallel on a front side of the first PCB such that each second PCB forms a 90 degree angle with the first PCB to allow air to flow in spaces defined between vertically adjacent second PCBs.
    Type: Application
    Filed: January 19, 2022
    Publication date: May 5, 2022
    Inventors: Pranav Devalla, Harold Wang, Prasad Venugopal, Aravind Musunuri
  • Linecard system using riser printed circuit boards (PCBS)
    Patent number: 11266007
    Abstract: A network device having improved thermal cooling is provided. The network device comprising a first printed circuit board (PCB) having a plurality of common connectors and one or more second PCBs, each second PCB coupled to the first PCB by a respective common connector of the plurality of common connectors. Each second PCB may include a set of ports, each port in the set of ports coupled to the respective common connector via the second PCB. The one or more second PCBs may be arranged vertically parallel on a front side of the first PCB such that each second PCB forms a 90 degree angle with the first PCB to allow air to flow in spaces defined between vertically adjacent second PCBs.
    Type: Grant
    Filed: September 18, 2019
    Date of Patent: March 1, 2022
    Assignee: Arista Networks, Inc.
    Inventors: Pranav Devalla, Harold Wang, Prasad Venugopal, Aravind Musunuri
  • LINECARD SYSTEM USING RISER PRINTED CIRCUIT BOARDS (PCBS)
    Publication number: 20210084749
    Abstract: A network device having improved thermal cooling is provided. The network device comprising a first printed circuit board (PCB) having a plurality of common connectors and one or more second PCBs, each second PCB coupled to the first PCB by a respective common connector of the plurality of common connectors. Each second PCB may include a set of ports, each port in the set of ports coupled to the respective common connector via the second PCB. The one or more second PCBs may be arranged vertically parallel on a front side of the first PCB such that each second PCB forms a 90 degree angle with the first PCB to allow air to flow in spaces defined between vertically adjacent second PCBs.
    Type: Application
    Filed: September 18, 2019
    Publication date: March 18, 2021
    Inventors: Pranav Devalla, Harold Wang, Prasad Venugopal, Aravind Musunuri
  • Via impedance matching
    Patent number: 10952313
    Abstract: An electronic circuit includes a first conductor configured horizontally on a first layer and a second conductor configured horizontally on a second layer. The second conductor is separated from the first conductor by a plurality of layers. A third conductor is configured between the first layer and the second layer. The third conductor electrically couples the first conductor and the second conductor. One or more intermediate conductors are electrically coupled to the third conductor, with the one or more intermediate conductors configured on one or more intermediate layers between the first layer and the second layer.
    Type: Grant
    Filed: January 22, 2020
    Date of Patent: March 16, 2021
    Assignee: ARISTA NETWORKS, INC.
    Inventors: Theophilus Ko, Pranav Devalla, Jim Weaver