Abstract: An electronic system may include a controller that measures a plurality of temperatures of the electronic system. Each of the plurality of temperatures may be indicated by one of a plurality of temperature voltages, each of which is generated across the same voltage-generation circuit. The controller and the voltage-generation circuit may be located on a component of the system, such as an integrated circuit, and external temperature sensors may provide their respective temperature signals to an input circuit located on the component. The controller may switch between activating and deactivating a temperature sensor located on the component and the input circuit to generate the plurality of temperature voltages across the voltage-generation circuit at different time intervals.

Abstract: An electronic system may include a controller that measures a plurality of temperatures of the electronic system. Each of the plurality of temperatures may be indicated by one of a plurality of temperature voltages, each of which is generated across the same voltage-generation circuit. The controller and the voltage-generation circuit may be located on a component of the system, such as an integrated circuit, and external temperature sensors may provide their respective temperature signals to an input circuit located on the component. The controller may switch between activating and deactivating a temperature sensor located on the component and the input circuit to generate the plurality of temperature voltages across the voltage-generation circuit at different time intervals.

Abstract: A high output voltage VOH level and a low output voltage VOL level parametric test system may include test circuitry coupled to output nodes of input/output (I/O) driver circuits. The test circuitry may source and sink current to the output nodes while the I/O driver circuits are in pull down and pull up states, respectively, in order to generate output voltages on the output nodes. The parametric test system may compare the output voltages with a plurality of high and low reference levels to determine ranges of the output voltages. The ranges may be used to determine whether the I/O driver circuits pass the VOH and VOL test requirements. The VOH/VOL test system may be implemented on-chip with other components of the external device, which may eliminate the need to perform other parametric testing with external test equipment.

Abstract: A high output voltage VOH level and a low output voltage VOL level parametric test system may include test circuitry coupled to output nodes of input/output (I/O) driver circuits. The test circuitry may source and sink current to the output nodes while the I/O driver circuits are in pull down and pull up states, respectively, in order to generate output voltages on the output nodes. The parametric test system may compare the output voltages with a plurality of high and low reference levels to determine ranges of the output voltages. The ranges may be used to determine whether the I/O driver circuits pass the VOH and VOL test requirements. The VOH/VOL test system may be implemented on-chip with other components of the external device, which may eliminate the need to perform other parametric testing with external test equipment.

Abstract: A proposed inrush control circuit may work in the presence of supply noise. A linear regulator in bypass mode may be designed for inrush current control, but may be susceptible to irregularities from increased supply noise. The circuit may include a splitting of the bypass power MOS that are switched on with some delay during the power on to control the initial power-on inrush current.

Abstract: A process detection circuit can detect process information in both PMOS and NMOS devices without external components or trimming. The process detection circuit may be able to identify process information on a gate-source voltage (VGS) that represents process effects. Identified process information may be used to optimize system on a chip (SoC) operation.

Abstract: A proposed inrush control circuit may work in the presence of supply noise. A linear regulator in bypass mode may be designed for inrush current control, but may be susceptible to irregularities from increased supply noise. The circuit may include a splitting of the bypass power MOS that are switched on with some delay during the power on to control the initial power-on inrush current.

Abstract: Described is a highly stable crystalline form of bosentan having a water content in the range of about 3-4% by weight, based on the total weight of the bosentan, (bosentan crystalline form A5), a process for preparation thereof, and pharmaceutical compositions comprising the bosentan crystalline form A5. Provided also herein is a bosentan impurity, p-tert-butyl-N[6-hydroxy-5-(2-methoxyphenoxy)-2-(2-pyrimidinyl)-4-pyrimidinyl]benzenesulfonamide (deshydroxyethyl bosentan impurity), and process for preparing and isolating thereof. Further provided are highly pure bosentan or a pharmaceutically acceptable salt thereof substantially free of deshydroxyethyl bosentan and bosentan dimer impurities, process for the preparation thereof, and pharmaceutical compositions comprising solid particles of highly pure bosentan or a pharmaceutically acceptable salt thereof, wherein 90 volume-percent of the particles (D90) have a size of less than about 300 microns.

Abstract: Disclosed herein are novel polymorphic forms of bosentan, processes for preparation, pharmaceutical compositions, and method of treating thereof.