Patents by Inventor Prasanna Jayaraman
Prasanna Jayaraman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11783932Abstract: A system for monitoring drug delivery is disclosed including a container having a medicine disposed inside, the medicine associated with a patient; a machine-readable code viewable from an outside of the container; a second code in an interior of the container not accessible until the container is opened; a computer configured to receive from a user device a video showing machine-readable code, the second code, and the patient take the medication, the computer having software executing on a computer readable medium for verifying an association of the medicine and the patient using the machine-readable code; verifying association of the machine-readable code and the patient using the second code; identifying patient movement in the video using a machine learning algorithm; and generating a score indicative of the likelihood the medicine was taken by the patient by weighing factors comprising the verification and the identified movements of the patient.Type: GrantFiled: November 9, 2022Date of Patent: October 10, 2023Assignee: SONARA HEALTH, INC.Inventors: Michael Giles, John Thomas Menchaca, Avinash Prasanna Jayaraman, Dimitri Macris
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Publication number: 20230123761Abstract: A system for monitoring drug delivery is disclosed including a container having a medicine disposed inside, the medicine associated with a patient; a machine-readable code viewable from an outside of the container; a second code in an interior of the container not accessible until the container is opened; a computer configured to receive from a user device a video showing machine-readable code, the second code, and the patient take the medication, the computer having software executing on a computer readable medium for verifying an association of the medicine and the patient using the machine-readable code; verifying association of the machine-readable code and the patient using the second code; identifying patient movement in the video using a machine learning algorithm; and generating a score indicative of the likelihood the medicine was taken by the patient by weighing factors comprising the verification and the identified movements of the patient.Type: ApplicationFiled: November 9, 2022Publication date: April 20, 2023Inventors: Michael Giles, John Thomas Menchaca, Avinash Prasanna Jayaraman, Dimitri Macris
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Patent number: 11521726Abstract: A system for monitoring drug delivery including a container having a medicine, the medicine associated with a patient and a code on an outside of the container. The system also including a user device having a camera and software executing on a computer readable medium for initiating recording of a video with the camera, prompting the patient to show the code in the video and show the taking of the medicine in the video. The system further includes a computer receiving the video, the computer having a datastore with a plurality of profiles, one of the plurality of profiles being a patient profile associated with the patient and software executing on a computer readable medium for storing the video, verifying the association of the medicine and the patient, identifying movement in the video, and generating a score indicative of the likelihood the medicine was taken by the patient.Type: GrantFiled: December 2, 2021Date of Patent: December 6, 2022Assignee: Sonara Health, Inc.Inventors: Michael Giles, John Thomas Menchaca, Avinash Prasanna Jayaraman, Dimitri Macris
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Publication number: 20220238199Abstract: A system for monitoring drug delivery including a container having a medicine, the medicine associated with a patient and a code on an outside of the container. The system also including a user device having a camera and software executing on a computer readable medium for initiating recording of a video with the camera, prompting the patient to show the code in the video and show the taking of the medicine in the video. The system further includes a computer receiving the video, the computer having a datastore with a plurality of profiles, one of the plurality of profiles being a patient profile associated with the patient and software executing on a computer readable medium for storing the video, verifying the association of the medicine and the patient, identifying movement in the video, and generating a score indicative of the likelihood the medicine was taken by the patient.Type: ApplicationFiled: December 2, 2021Publication date: July 28, 2022Inventors: Michael Giles, John Thomas Menchaca, Avinash Prasanna Jayaraman, Dimitri Macris
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Patent number: 11177665Abstract: A computer controls voltage supply for a system that includes a plurality of active cables. The computer determines that a first voltage source included in a first cable has failed to provide a required amount of voltage to the first cable. The computer switches the first cable to a second voltage source included in a second cable. The second voltage source provides voltage to the first cable.Type: GrantFiled: November 26, 2019Date of Patent: November 16, 2021Assignee: International Business Machines CorporationInventors: Pavel Roy Paladhi, Prasanna Jayaraman, Nam Huu Pham, Daniel M. Dreps
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Patent number: 11157274Abstract: A computer uses an active cable architecture to control communications. The computer sends a first set of instructions for completion of an activity to a first micro-controller of an active communication cable. The computer determines that at least one transceiver of an active cable is to receive a set of signals from the first micro-controller. The computer forms a communication connection between the first micro-controller and the at least one transceiver. The computer sends a second set of instructions to the at least one transceiver, wherein the second set of instructions instruct the at least one transceiver to complete at least a portion of the activity.Type: GrantFiled: November 26, 2019Date of Patent: October 26, 2021Assignee: International Business Machines CorporationInventors: Pavel Roy Paladhi, Prasanna Jayaraman, Nam Huu Pham, Daniel M. Dreps
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Publication number: 20210159707Abstract: A computer controls voltage supply for a system that includes a plurality of active cables. The computer determines that a first voltage source included in a first cable has failed to provide a required amount of voltage to the first cable. The computer switches the first cable to a second voltage source included in a second cable. The second voltage source provides voltage to the first cable.Type: ApplicationFiled: November 26, 2019Publication date: May 27, 2021Inventors: Pavel Roy Paladhi, Prasanna Jayaraman, Nam Huu Pham, Daniel M. Dreps
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Publication number: 20210157579Abstract: A computer uses an active cable architecture to control communications. The computer sends a first set of instructions for completion of an activity to a first micro-controller of an active communication cable. The computer determines that at least one transceiver of an active cable is to receive a set of signals from the first micro-controller. The computer forms a communication connection between the first micro-controller and the at least one transceiver. The computer sends a second set of instructions to the at least one transceiver, wherein the second set of instructions instruct the at least one transceiver to complete at least a portion of the activity.Type: ApplicationFiled: November 26, 2019Publication date: May 27, 2021Inventors: Pavel Roy Paladhi, Prasanna Jayaraman, Nam Huu Pham, Daniel M. Dreps
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Patent number: 10901936Abstract: A method, system, and/or computer program product controls transitions from a first bandwidth to a second bandwidth in a bus within a multi-processor computer. A bus controller predicts a bandwidth transition requirement for a bus in a multi-processor computer, and transitions the bus from a first bandwidth to a second bandwidth based on the predicted bandwidth transition requirement. The bus controller checks an actual transitioning requirement of the bus in the computer, such that the bus controller checks the actual transitioning requirement for the bus at each occurrence of a predefined stage of operation of one or more processor processors in the computer. In response to the actual transitioning requirement matching the predicted bandwidth transition requirement, the bus controller directions a continuation of the transitioning of the bus from the first bandwidth to the second bandwidth.Type: GrantFiled: July 21, 2016Date of Patent: January 26, 2021Assignee: International Business Machines CorporationInventors: Daniel M. Dreps, Prasanna Jayaraman, Michael B. Spear
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Patent number: 10831620Abstract: A method, executed by a computer, includes pairing a first core with a second core to form a first core group, wherein each core of the group has a plurality of functional units, transferring instructions received by the first core to the second core for execution via a first inter-core communication bus, and executing the instructions on the second core. A computer system and computer program product corresponding to the above method are also disclosed herein.Type: GrantFiled: June 15, 2016Date of Patent: November 10, 2020Assignee: International Business Machines CorporationInventors: Manoj Dusanapudi, Prasanna Jayaraman, Rahul M. Rao
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Patent number: 10831688Abstract: A method, a system and a computer program product for supporting a reconfigurable hardware network topology including graphics processor units (GPU) and central processing unit (CPU) interconnectivity. The re-configurability of the network is based on data bandwidth and latency requirements of running workloads obtained by running training workload sequences upon the configured topology. For network re-configurability, a user enabled to directly connect high-speed cable links between CPU/GPU connectors and between GPU/GPU connectors. Further included in a configured network topology are switches configurable to provide one or more PCIe high-speed side-band links, as well as a high speed multiplexor, that can switch the network topology. The method prepares a system map of the hardware network topology, and generates a GPU weightage pattern based on data bandwidth and latencies of the configured GPUs such that GPUs are assigned to workloads based on its weightage to optimize workload performance.Type: GrantFiled: August 21, 2018Date of Patent: November 10, 2020Assignee: International Business Machines CorporationInventors: Prasanna Jayaraman, Daniel M. Dreps, Erich J. Hauptli
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Patent number: 10749758Abstract: An apparatus for cognitive data center management is disclosed. A computer-implemented method and computer program product also perform the functions of the apparatus. According to an embodiment of the present invention, the apparatus includes a performance module that determines performance metrics over a predetermined time interval at a device coordinate in a three-dimensional (“3D”) coordinate system for each replaceable device of a plurality of replaceable devices within a data center. The apparatus maps the performance metrics to environmental sensor measurements taken in the 3D coordinate system. The apparatus further includes an input analysis module that uses discovery analytics to determine a predicted time to failure for each replaceable device.Type: GrantFiled: November 21, 2018Date of Patent: August 18, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Khajistha Fattu, Michael Fattu, Prasanna Jayaraman, Tony Sawan, Eakambaram R. Thirumalai
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Patent number: 10747280Abstract: A method, a system and a computer program product for reconfiguring hardware network topology including graphics processor units (GPU) and central processing unit (CPU) interconnectivity on or across compute nodes of a rack-mount server. The re-configurability is based on detected thermal throttling or thermal hot spots when running workloads. For network re-configurability, a user can directly connect high-speed cable links between CPU/GPU connectors and between GPU/GPU connectors on a same PCB compute node, or across two PCB compute nodes as suggested by a control processor to avoid thermal and power hotspots when running the workload. The method recommends and generates a system map of the hardware network topology known to avoid/mitigate thermal throttling, and instructs a configuration of CPUs and GPUs such that GPUs are assigned to workloads at locations for mitigating thermal throttling based on detected thermal hot spots and power hot spots to optimize workload performance.Type: GrantFiled: November 27, 2018Date of Patent: August 18, 2020Assignee: International Business Machines CorporationInventors: Prasanna Jayaraman, Daniel M. Dreps, Erich Jurg Hauptli
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Publication number: 20200166977Abstract: A method, a system and a computer program product for reconfiguring hardware network topology including graphics processor units (GPU) and central processing unit (CPU) interconnectivity on or across compute nodes of a rack-mount server. The re-configurability is based on detected thermal throttling or thermal hot spots when running workloads. For network re-configurability, a user can directly connect high-speed cable links between CPU/GPU connectors and between GPU/GPU connectors on a same PCB compute node, or across two PCB compute nodes as suggested by a control processor to avoid thermal and power hotspots when running the workload. The method recommends and generates a system map of the hardware network topology known to avoid/mitigate thermal throttling, and instructs a configuration of CPUs and GPUs such that GPUs are assigned to workloads at locations for mitigating thermal throttling based on detected thermal hot spots and power hot spots to optimize workload performance.Type: ApplicationFiled: November 27, 2018Publication date: May 28, 2020Inventors: Prasanna Jayaraman, Daniel M. Dreps, Erich Jurg Hauptli
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Publication number: 20200162342Abstract: An apparatus for cognitive data center management is disclosed. A computer-implemented method and computer program product also perform the functions of the apparatus. According to an embodiment of the present invention, the apparatus includes a performance module that determines performance metrics over a predetermined time interval at a device coordinate in a three-dimensional (“3D”) coordinate system for each replaceable device of a plurality of replaceable devices within a data center. The apparatus maps the performance metrics to environmental sensor measurements taken in the 3D coordinate system. The apparatus further includes an input analysis module that uses discovery analytics to determine a predicted time to failure for each replaceable device.Type: ApplicationFiled: November 21, 2018Publication date: May 21, 2020Inventors: KHAJISTHA FATTU, MICHAEL FATTU, PRASANNA JAYARAMAN, TONY SAWAN, EAKAMBARAM R. THIRUMALAI
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Patent number: 10614004Abstract: Examples of techniques for memory transaction prioritization for a memory are disclosed. In one example implementation according to aspects of the present disclosure, a computer-implemented method includes allocating, by a memory controller, a reserved portion of the memory controller to execute transactions. The method further includes receiving, by the memory controller, a priority based transaction from a processor to the memory. The method further includes determining, by the memory controller, whether to accommodate the priority based transaction based at least in part on a current processing state of the memory controller. The method further includes, based at least in part on determining to accommodate the priority based transaction, accommodating the priority based transaction by performing at least one of dropping a speculative command in a queue or using the reserved portion of the memory controller to execute the priority based transaction.Type: GrantFiled: July 23, 2018Date of Patent: April 7, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Irving G. Baysah, Prasanna Jayaraman
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Publication number: 20200065283Abstract: A method, a system and a computer program product for supporting a reconfigurable hardware network topology including graphics processor units (GPU) and central processing unit (CPU) interconnectivity. The re-configurability of the network is based on data bandwidth and latency requirements of running workloads obtained by running training workload sequences upon the configured topology. For network re-configurability, a user enabled to directly connect high-speed cable links between CPU/GPU connectors and between GPU/GPU connectors. Further included in a configured network topology are switches configurable to provide one or more PCIe high-speed side-band links, as well as a high speed multiplexor, that can switch the network topology. The method prepares a system map of the hardware network topology, and generates a GPU weightage pattern based on data bandwidth and latencies of the configured GPUs such that GPUs are assigned to workloads based on its weightage to optimize workload performance.Type: ApplicationFiled: August 21, 2018Publication date: February 27, 2020Inventors: Prasanna Jayaraman, Daniel M. Dreps, Erich J. Hauptli
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Patent number: 10571515Abstract: It is determined that a guard band frequency for a first processor is to be determined. The guard band frequency is associated with a first system configuration. A validation start frequency is determined based, at least in part, on data associated with at least one of the first processor or a second processor. The validation start frequency is between a nominal operating frequency for the first processor and a system maximum operating frequency for the first processor. A guard band frequency for the second processor was previously determined. The guard band frequency for the first processor is determined based, at least in part, on the validation start frequency.Type: GrantFiled: October 3, 2014Date of Patent: February 25, 2020Assignee: International Business Machines CorporationInventors: Robert W. Berry, Jr., Diyanesh B. Chinnakkonda, Prasanna Jayaraman, Tony E. Sawan
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Patent number: 10409352Abstract: Methods, apparatuses, and products for budgeting for power consumption in a chassis environment that includes a plurality of integrated technology elements (‘ITEs’), each ITE having power utilization information indicating an average power consumption of the ITE, including: determining, by a chassis management module, a total power requirement value based on a sum of the average power consumption for each ITE; increasing, by the chassis management module, the total power requirement value in dependence upon a predetermined power utilization delta; identifying, by the chassis management module, one or more power supplies to provide power to the ITEs in the chassis environment in dependence upon power delivery capabilities of the one or more power supplies and the total power requirement value; and powering on the identified one or more power supplies by the chassis management module.Type: GrantFiled: October 30, 2017Date of Patent: September 10, 2019Assignee: International Business Machines CorporationInventors: Saurabh Chadha, Prasanna Jayaraman, Tony E. Sawan
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Patent number: 10388258Abstract: Remapping software elements to increase the usability of a device with a damaged screen including receiving a request to transition the device with the damaged screen into damaged screen mode; dividing, by a remapping module, the damaged screen into a plurality of sectors; determining, by the remapping module, a usability of each of the plurality of sectors of the damaged screen; remapping, by the remapping module, elements of device software to sectors based on the usability of each of the plurality of sectors of the damaged screen; and presenting the remapped elements of the device software to a user of the device.Type: GrantFiled: June 21, 2017Date of Patent: August 20, 2019Assignee: International Business Machines CorporationInventor: Prasanna Jayaraman