Patents by Inventor Prashant Sethi

Prashant Sethi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190317774
    Abstract: Automatic-switching and deployment of software (SW)- or firmware (FW)-based USB4 connection managers (CMs) and associated methods, apparatus, software and firmware. A handshake is defined between BIOS and an operating system (OS) to discover supported CM capability and dynamically switch from a FW CM to a SW CM and visa verse if there is a mismatch. In addition, a mechanism is defined to deploy the correct FW or SW CM driver based on class code, 2-part or 4-part ID. Support for continued USB4 operation during an OS upgrade or downgrade is provided, while ensuring that the best possible CM solution is used based on the advertised platform and OS capability. USB4 controllers support a pass-through mode under which the host controller FW redirects control packets sent between an SW CM and a USB4 fabric, and a FW CM mode under which control packets are communicated between the host controller FW and the USB4 fabric to configure USB4 peripheral devices and/or USB4 hubs in the USB4 fabric.
    Type: Application
    Filed: June 28, 2019
    Publication date: October 17, 2019
    Inventors: Vinay Raghav, Prashant Sethi, Robert Gough, Reuven Rozic, Uri Soloveychik
  • Publication number: 20190114266
    Abstract: A method and apparatus for matching parent processor address translations to media processors' address translations and providing concurrent memory access to a plurality of media processors through separate translation table information. In particular, a page directory for a given media application is copied to a media processor's page directory when the media application allocates memory that is to be shared by a media application running on the parent processor and media processors.
    Type: Application
    Filed: October 12, 2018
    Publication date: April 18, 2019
    Inventors: Brent S. BAXTER, Clifford D. HALL, Prashant SETHI, William H. CLIFFORD
  • Publication number: 20190065423
    Abstract: Various techniques for enabling the control and monitoring of a USB device mode controller to a USB-C connector, for the performance of a USB device mode data connection, are disclosed herein. In an example, a computing system that includes multiple USB-C connectors but a single USB device mode controller may manage the mapping of the controller to a particular connector, through operations that identify the mapping and the characteristics of the connector, process a request to change the mapping of the device mode controller, and perform the change to the mapping of the device mode controller. Such a change may include a disconnection or reassignment of a particular USB-C connector to the controller. Further examples to determine the availability of a USB device mode controller, and respond to a scenario where the USB device mode controller is not available, are also disclosed.
    Type: Application
    Filed: August 23, 2018
    Publication date: February 28, 2019
    Inventors: Vijaykumar B. Kadgi, Tin-Cheung Kung, Nivedita Aggarwal, Chia-Hung Kuo, Prashant Sethi
  • Publication number: 20190050263
    Abstract: Technologies for scheduling acceleration in a pool of accelerator devices include a compute device. The compute device includes a compute engine to execute an application. The compute device also includes an accelerator pool including multiple accelerator devices. Additionally, the compute device includes an acceleration scheduler logic unit to obtain, from the application, a request to accelerate a function, determine a capacity of each accelerator device in the accelerator pool, schedule, in response to the request and as a function of the determined capacity of each accelerator device, acceleration of the function on one or more of the accelerator devices to produce output data, and provide, to the application and in response to completion of acceleration of the function, the output data to the application.
    Type: Application
    Filed: March 5, 2018
    Publication date: February 14, 2019
    Inventors: Hamesh Patel, Aniket A. Borkar, Prashant Sethi, Deviusha Krishnamoorthy
  • Publication number: 20180331900
    Abstract: An embodiment of a device manager apparatus may include a request processor to process a request for a reconfiguration of a reconfigurable device, a configuration controller communicatively coupled to the request processor to reconfigure the reconfigurable device based on the request, and a pseudo-device manager communicatively coupled to the request processor to create a pseudo device based on the request which corresponds to a functionality of the reconfiguration.
    Type: Application
    Filed: May 11, 2017
    Publication date: November 15, 2018
    Applicant: Intel Corporation
    Inventors: Utkarsh Y. Kakaiya, Joshua D. Fender, Joseph Grecco, Prashant Sethi, Nagabhushan Chitlur, Pratik M. Marolia, Henry M. Mitchel
  • Patent number: 10102141
    Abstract: A method and apparatus for matching parent processor address translations to media processors' address translations and providing concurrent memory access to a plurality of media processors through separate translation table information. In particular, a page directory for a given media application is copied to a media processor's page directory when the media application allocates memory that is to be shared by a media application running on the parent processor and media processors.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: October 16, 2018
    Assignee: Intel Corporation
    Inventors: Brent S. Baxter, Clifford D. Hall, Prashant Sethi, William H. Clifford
  • Patent number: 10089247
    Abstract: One embodiment provides an apparatus. The apparatus includes an input output memory management unit (I/O MMU), a non-secure operating system (OS) driver, a secure OS driver and a virtual machine monitor (VMM). The I/OMMU is to couple an I/O Controller to a memory. The I/O Controller is coupled to a secure device and a non-secure device and has one I/O Controller identifier. The non-secure OS driver is associated with the non-secure device. The secure OS driver is associated with the secure device. The VMM is to allocate a secure address space to a secure OS and a non-secure address space to a non-secure OS. The secure address space is non-overlapping with the non-secure address space.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: October 2, 2018
    Assignee: Intel Corporation
    Inventors: Nitin V. Sarangdhar, Baiju V. Patel, Tin-Cheung Kung, Joseph F. Cihula, Prashant Sethi, Vinay Kumar Rangineni
  • Patent number: 10078608
    Abstract: Various techniques for enabling the control and monitoring of a USB device mode controller to a USB-C connector, for the performance of a USB device mode data connection, are disclosed herein. In an example, a computing system that includes multiple USB-C connectors but a single USB device mode controller may manage the mapping of the controller to a particular connector, through operations that identify the mapping and the characteristics of the connector, process a request to change the mapping of the device mode controller, and perform the change to the mapping of the device mode controller. Such a change may include a disconnection or reassignment of a particular USB-C connector to the controller. Further examples to determine the availability of a USB device mode controller, and respond to a scenario where the USB device mode controller is not available, are also disclosed.
    Type: Grant
    Filed: September 28, 2016
    Date of Patent: September 18, 2018
    Assignee: Intel Corporation
    Inventors: Vijaykumar B. Kadgi, Tin-Cheung Kung, Nivedita Aggarwal, Chia-Hung Kuo, Prashant Sethi
  • Publication number: 20180253385
    Abstract: A method and apparatus for matching parent processor address translations to media processors' address translations and providing concurrent memory access to a plurality of media processors through separate translation table information. In particular, a page directory for a given media application is copied to a media processor's page directory when the media application allocates memory that is to be shared by a media application running on the parent processor and media processors.
    Type: Application
    Filed: March 1, 2018
    Publication date: September 6, 2018
    Inventors: Brent S. BAXTER, Clifford D. HALL, Prashant SETHI, William H. CLIFFORD
  • Patent number: 10061707
    Abstract: A first device is determined as connected to a first one of a plurality of ports of a root complex. Addresses are assigned corresponding to a first hierarchy of devices including the first device. A second device is determined as connected through a mapping portal bridge at a second one of the ports of the root complex, the second device included in another second hierarchy of devices. A mapping table is generated that corresponds to the mapping portal bridge. The mapping table defines a translation between addressing used in a first view of a configuration address space of the system and addressing used in a second view of the configuration address space. The first view includes a view of the root complex and the second view includes a view corresponding to the second hierarchy of devices, the first hierarchy of devices being addressed according to the first view.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: August 28, 2018
    Assignee: Intel Corporation
    Inventors: Shanthanand Kutuva Rabindranath, David J. Harriman, Prashant Sethi, Vijayalakshmi Kothandan
  • Patent number: 10048881
    Abstract: An apparatus includes an extended capability register and an input/output (I/O) memory management circuitry. The I/O memory management circuitry is to receive, from an I/O device, an address translation request referencing a guest virtual address associated with a guest virtual address space of a virtual machine. The I/O memory management circuitry may translate the guest virtual address to a guest physical address associated with a guest physical address space of the virtual machine, and, responsive to determining that a value stored by the extended capability register indicates a restrict-translation-request-response (RTRR) mode, transmit, to the I/O device, a translation response having the guest physical address.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: August 14, 2018
    Assignee: Intel Corporation
    Inventors: Rajesh M. Sankaran, Prashant Sethi, Asit K. Mallick, David Woodhouse, Rupin H. Vakharwala
  • Publication number: 20180181527
    Abstract: Examples include techniques for dynamically modifying a platform form factor of a mobile device. In some examples, a system may include a split memory array having a first memory within a docking system and a second memory element within a small form factor (SFF) mobile device. A platform form factor determination component may dynamically select between multiple platform form factors based on a determination that the SFF mobile device is coupled with the docking system. An interface logic component may access the first memory storage of the docking system during a memory (e.g., graphics) computation when the mobile device is physically and electrically/communicably coupled with the docking system to allow the SFF mobile device to have full LFF functionality. When the SFF mobile device is disconnected from the docking system, the interface logic component may access only the second memory storage of the SFF mobile device to provide SFF functionality.
    Type: Application
    Filed: December 28, 2016
    Publication date: June 28, 2018
    Applicant: INTEL CORPORATION
    Inventors: TAWFIK M. RAHAL-ARABI, PRASHANT SETHI, ANTHONY M. CONSTANTINE, YU-LIANG SHIAO, CHANG-WU YEN
  • Patent number: 9990206
    Abstract: In an embodiment, a method is provided. The method includes managing user-level threads on a first instruction sequencer in response to executing user-level instructions on a second instruction sequencer that is under control of an application level program. A first user-level thread is run on the second instruction sequencer and contains one or more user level instructions. A first user level instruction has at least 1) a field that makes reference to one or more instruction sequencers or 2) implicitly references with a pointer to code that specifically addresses one or more instruction sequencers when the code is executed.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: June 5, 2018
    Assignee: INTEL CORPORATION
    Inventors: Hong Wang, John Shen, Edward Grochowski, Richard Hankins, Gautham Chinya, Bryant Bigbee, Shivnandan Kaushik, Xiang Chris Zou, Per Hammarlund, Scott Dion Rodgers, Xinmin Tian, Anil Aggawal, Prashant Sethi, Baiju Patel, James Held
  • Publication number: 20180137074
    Abstract: Bridge logic is provided to receive a request from a device, where the request references an address of a secondary address space. The secondary address space corresponds to a subset of addresses in a configuration address space of a system, and the secondary address space corresponds to a first view of the configuration address space. The bridge logic uses a mapping table to translate the address into a corresponding address in the configuration address space, where addresses of the configuration address space correspond to a different second view of the configuration address space.
    Type: Application
    Filed: December 20, 2015
    Publication date: May 17, 2018
    Applicant: Intel Corporation
    Inventors: Prashant Sethi, Michael T. Klinglesmith, David J. Harrimann, Reuven Rozic
  • Publication number: 20180095900
    Abstract: One embodiment provides an apparatus. The apparatus includes an input output memory management unit (I/O MMU), a non-secure operating system (OS) driver, a secure OS driver and a virtual machine monitor (VMM). The I/OMMU is to couple an I/O Controller to a memory. The I/O Controller is coupled to a secure device and a non-secure device and has one I/O Controller identifier. The non-secure OS driver is associated with the non-secure device. The secure OS driver is associated with the secure device. The VMM is to allocate a secure address space to a secure OS and a non-secure address space to a non-secure OS. The secure address space is non-overlapping with the non-secure address space.
    Type: Application
    Filed: September 30, 2016
    Publication date: April 5, 2018
    Applicant: INTEL CORPORATION
    Inventors: Nitin V. Sarangdhar, Baiju V. Patel, Tin-Cheung Kung, Joseph F. Cihula, Prashant Sethi, Vinay Kumar Rangineni
  • Patent number: 9934158
    Abstract: A method and apparatus for matching parent processor address translations to media processors' address translations and providing concurrent memory access to a plurality of media processors through separate translation table information. In particular, a page directory for a given media application is copied to a media processor's page directory when the media application allocates memory that is to be shared by a media application running on the parent processor and media processors.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: April 3, 2018
    Assignee: Intel Corporation
    Inventors: Brent S. Baxter, Clifford D. Hall, Prashant Sethi, William H. Clifford
  • Publication number: 20180081843
    Abstract: Various techniques for enabling the control and monitoring of a USB device mode controller to a USB-C connector, for the performance of a USB device mode data connection, are disclosed herein. In an example, a computing system that includes multiple USB-C connectors but a single USB device mode controller may manage the mapping of the controller to a particular connector, through operations that identify the mapping and the characteristics of the connector, process a request to change the mapping of the device mode controller, and perform the change to the mapping of the device mode controller. Such a change may include a disconnection or reassignment of a particular USB-C connector to the controller. Further examples to determine the availability of a USB device mode controller, and respond to a scenario where the USB device mode controller is not available, are also disclosed.
    Type: Application
    Filed: September 28, 2016
    Publication date: March 22, 2018
    Inventors: Vijaykumar B. Kadgi, Tin-Cheung Kung, Nivedita Aggarwal, Chia-Hung Kuo, Prashant Sethi
  • Publication number: 20180046522
    Abstract: Particular embodiments described herein provide for an electronic device that can receive data from an operating system in an electronic device, where the data is related to hardware that is in communication with the electronic device through a multimodal interface and communicate the data and/or related data to a local policy manager, where the local policy manager is in communication with the multimodal interface. The multimodal interface can be configured to support power transfers, directionality, and multiple input/output (I/O) protocols on the same interface.
    Type: Application
    Filed: March 21, 2016
    Publication date: February 15, 2018
    Applicant: Intel Corporation
    Inventors: Peter S. Adamson, Nivedita Aggarwal, Karunakara Kotary, Abdul Rahman Ismail, Tin-Cheung Kung, David T. Hines, Chia-Hung Sophia Kuo, Ajay V. Bhatt, Karthi R. Vadivelu, Prashant Sethi
  • Patent number: 9875102
    Abstract: Embodiments of the invention provide a method of creating, based on an operating-system-scheduled thread running on an operating-system-visible sequencer and using an instruction set extension, a persistent user-level thread to run on an operating-system-sequestered sequencer independently of context switch activities on the operating-system-scheduled thread. The operating-system-scheduled thread and the persistent user-level thread may share a common virtual address space. Embodiments of the invention may also provide a method of causing a service thread running on an additional operating-system-visible sequencer to provide operating system services to the persistent user-level thread. Embodiments of the invention may further provide apparatus, system, and machine-readable medium thereof.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: January 23, 2018
    Assignee: Intel Corporation
    Inventors: Gautham Chinya, Hong Wang, Prashant Sethi, Shivnandan Kaushik, Bryant Bigbee, John Shen, Richard Hankins, Xiang Zou, Baiju V. Patel, Jason W. Brandt, Anil Aggarwal, John L. Reid
  • Publication number: 20180011651
    Abstract: An apparatus includes an extended capability register and an input/output (I/O) memory management circuitry. The I/O memory management circuitry is to receive, from an I/O device, an address translation request referencing a guest virtual address associated with a guest virtual address space of a virtual machine. The I/O memory management circuitry may translate the guest virtual address to a guest physical address associated with a guest physical address space of the virtual machine, and, responsive to determining that a value stored by the extended capability register indicates a restrict-translation-request-response (RTRR) mode, transmit, to the I/O device, a translation response having the guest physical address.
    Type: Application
    Filed: July 11, 2016
    Publication date: January 11, 2018
    Inventors: Rajesh M. Sankaran, Prashant Sethi, Asit K. Mallick, David Woodhouse, Rupin H. Vakharwala