Abstract: A power management method and mechanism for dynamically determining which of a plurality of blocks of an electrical device may be powered on or off. A device is contemplated which includes one or more power manageable groups. A power management unit associated with the apparatus is configured to detect instructions which are scheduled for execution, identify particular power group(s) which may be required for execution of the instruction, and convey an indication which prevents the particular power group(s) from entering a powered off state, in response to detecting said instruction. If the power management unit does not detect an incoming or pending instructions, for a predetermined period of time, which requires a particular power group(s) for execution, the power management unit may convey an indication which causes or permits the corresponding power group(s) to enter a powered off state.

Abstract: A technique for managing power consumption of a cache memory system dynamically adjusts the size of the cache memory system according to an energy level of an energy storage device. In at least one embodiment of the invention, an apparatus includes a dynamically scalable cache memory circuit including at least one cache memory circuit having an effective cache size selectable from a plurality of cache sizes. The apparatus includes a control circuit responsive to an energy level indicator of at least an approximate energy level of an energy storage device configured to provide energy to the dynamically scalable cache memory circuit. The control circuit is configured to select the effective cache size based at least in part on the energy level indicator.

Abstract: A method and system for efficiently managing power consumption in a mobile device controls power consumption with an adjustable sleep period or listening interval that may be user-specified and automatically tuned based on recent detected usage. With an adjustable sleep period, a receiver conserves power by leaving a sleep mode only at predefined and adjustable periods, which may be selected by the user to balance connectivity and power saving and which may be automatically incremented when the device activity is low.

Abstract: A technique for managing power consumption of a cache memory system dynamically adjusts the size of the cache memory system according to an energy level of an energy storage device. In at least one embodiment of the invention, an apparatus includes a dynamically scalable cache memory circuit including at least one cache memory circuit having an effective cache size selectable from a plurality of cache sizes. The apparatus includes a control circuit responsive to an energy level indicator of at least an approximate energy level of an energy storage device configured to provide energy to the dynamically scalable cache memory circuit. The control circuit is configured to select the effective cache size based at least in part on the energy level indicator.

Abstract: A power management method and mechanism for dynamically determining which of a plurality of blocks of an electrical device may be powered on or off. A device is contemplated which includes one or more power manageable groups. A power management unit associated with the apparatus is configured to detect instructions which are scheduled for execution, identify particular power group(s) which may be required for execution of the instruction, and convey an indication which prevents the particular power group(s) from entering a powered off state, in response to detecting said instruction. If the power management unit does not detect an incoming or pending instructions, for a predetermined period of time, which requires a particular power group(s) for execution, the power management unit may convey an indication which causes or permits the corresponding power group(s) to enter a powered off state.

Abstract: A method and system for efficiently managing power consumption in a digital processor controls the CPU clock rate based on actual CPU workload by monitoring a measure of the CPU's activity to estimate the required clock speed consumption and adjusting the clock rate up or down to meet the actual estimated speed consumption. In an exemplary embodiment, a measure of the CPU's idleness is monitored and used, along with other parameters, to compute required clock speed changes.