Patents by Inventor Pushparaj Dominic

Pushparaj Dominic has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160088549
    Abstract: One example discloses a communications system, having: a communications unit, including circuits for processing data signal frequencies; a geographic location unit having a first location signal input, triggered at a first geographic location, and a second location signal input, triggered at a second geographic location; a geographic frequency database including: a first subset of data signal frequencies which can be validated by the communications unit at the first location; and a second subset of data signal frequencies which can be validated by the communications unit at the second location; a frequency scan control unit electrically coupled to the communications unit, the geographic location unit and the geographic frequency database; and wherein the scan control unit configures the communications unit to process the first subset of communication frequencies in response to the first location trigger and to process the second subset of communication frequencies in response to the second location trigger.
    Type: Application
    Filed: September 24, 2014
    Publication date: March 24, 2016
    Inventors: Pushparaj Dominic, Bijo Thomas
  • Publication number: 20120176201
    Abstract: Various embodiments relate to a receiver and a timing circuit for synchronization between a transmitter clock of an MPEG stream and the local system clock of a receiver. The timing circuit may implement a phase-locked loop (PLL) circuit with a MD controller to produce a control signal based on the difference between the transmitter reference clock and the local system clock. Various embodiments may use clock differential signals and an accumulated error signal to produce proportional, integral, and derivative output components for a control signal. The control signal may control a signal generator that adjusts the frequency and/or phase of the local signal clock to lock with the transmitter reference clock. Various embodiments may also include an outlier filter to remove error signals outside a defined range and/or a programmable system clock to add precision to the generated local system clock.
    Type: Application
    Filed: January 11, 2011
    Publication date: July 12, 2012
    Applicant: NXP B.V. Intellectual Property & Licensing
    Inventors: S. Ganesh, Pushparaj Dominic
  • Publication number: 20060168495
    Abstract: In one aspect, a method and apparatus for advancing a state of a cyclic redundancy check (CRC) computation on a transmitted message via a look-up table (LUT) storing a plurality of entries associated with possible states of the CRC computation is provided. A plurality of indexes is computed based on a message chunk and a current state of the CRC computation to obtain a plurality of entries from an LUT. The plurality of entries is used to determine an advanced state of the CRC computation. In another aspect, the LUT is accessed with the plurality of indexes in parallel. In another aspect the LUT includes fewer than 2k entries, where k is the number of states advanced on each iteration.
    Type: Application
    Filed: January 25, 2005
    Publication date: July 27, 2006
    Applicant: Analog Devices, Inc.
    Inventors: Pushparaj Dominic, Anshoo Tandon
  • Patent number: 6975253
    Abstract: The proposed technique uses basic properties of a Huffman codebook to decode a coded data bit stream having a plurality of variable length codewords based on the Huffman codebook. This is achieved by sorting codewords in the Huffman codebook based on potential values. The potential values are computed using the basic parameters of the codewords in the Huffman codebook. A current bit sequence having a predetermined length is extracted from the coded data bit stream. A potential value of the extracted bit sequence is then computed using the basic parameters of the codewords in the Huffman codebook. The sorted Huffman codebook is then searched to find a computed potential value in the sorted Huffman codebook that is substantially close to the computed potential value of the extracted bit sequence. The extracted current bit sequence is decoded based on the outcome of the search.
    Type: Grant
    Filed: August 6, 2004
    Date of Patent: December 13, 2005
    Assignee: Analog Devices, Inc.
    Inventor: Pushparaj Dominic