Patents by Inventor Qasim R. Shami

Qasim R. Shami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7657696
    Abstract: A method for automatically detecting a plurality of parameters for a NAND-Flash memory. A first step of the method may include generating a plurality of address cycles for the NAND-Flash memory. A second step may set an address number parameter of the parameters based on (i) a first number of the address cycles generated and (ii) a status signal generated by the NAND-Flash memory responsive to the address cycles. A third step generally includes generating at least one read cycle for the NAND-Flash memory after determining the address number parameter. A fourth step may set a page size parameter of the parameters based on (i) a second number of the read cycles generated and (ii) the status signal further responsive to the read cycles.
    Type: Grant
    Filed: February 25, 2005
    Date of Patent: February 2, 2010
    Assignee: LSI Corporation
    Inventors: Zhiqiang J. Su, Qasim R. Shami, Hongping Liu, Hui Lan
  • Patent number: 6883082
    Abstract: A circuit generally comprising a memory and a core module is disclosed. The memory may be configured as (i) a first stack having a plurality of index pointers and (ii) a table having a plurality of entries. The core module may be configured to (i) pop a first index pointer of the index pointers from the first stack in response to receiving a first command generated by a first module external to the circuit, (ii) assign a first entry of the entries identified by the first index pointer to the first module, (iii) generate an address in response to converting the first index pointer and (iv) transfer the address to the first module.
    Type: Grant
    Filed: December 19, 2002
    Date of Patent: April 19, 2005
    Assignee: LSI Logic Corporation
    Inventors: Qasim R. Shami, Jagmohan Rajpal
  • Publication number: 20040123038
    Abstract: A circuit generally comprising a memory and a core module is disclosed. The memory may be configured as (i) a first stack having a plurality of index pointers and (ii) a table having a plurality of entries. The core module may be configured to (i) pop a first index pointer of the index pointers from the first stack in response to receiving a first command generated by a first module external to the circuit, (ii) assign a first entry of the entries identified by the first index pointer to the first module, (iii) generate an address in response to converting the first index pointer and (iv) transfer the address to the first module.
    Type: Application
    Filed: December 19, 2002
    Publication date: June 24, 2004
    Applicant: LSI LOGIC CORPORATION
    Inventors: Qasim R. Shami, Jagmohan Rajpal