Abstract: A method for adding a map element is provided. In the method, a name of a layer to which a map element to be added by a target application program belongs, display follow information of the map element in the layer, and weather impact information of the map element are generated. A preform of the map element is generated in a target folder. Further, code configured to update the map element. The code indicates a storage position of the preform of the map element and display state information of the map element being displayed in the layer. Apparatus and non-transitory computer-readable storage medium counterpart embodiments are also contemplated.

Abstract: The present disclosure provides a display substrate and a display device, and belongs to the field of display technology. The display substrate includes: a base substrate having a peripheral region, and thin film transistors disposed in the peripheral region of the base substrate. A gate electrode of the thin film transistor includes a plurality of sub-electrodes arranged at intervals.

Abstract: The present disclosure provides a display substrate and a display device, and belongs to the field of display technology. The display substrate includes: a base substrate having a peripheral region, and thin film transistors disposed in the peripheral region of the base substrate. A gate electrode of the thin film transistor includes a plurality of sub-electrodes arranged at intervals.

Abstract: A method for adding a map element is provided. In the method, a name of a layer to which a map element to be added by a target application program belongs, display follow information of the map element in the layer, and weather impact information of the map element are generated. A preform of the map element is generated in a target folder. Further, code configured to update the map element. The code indicates a storage position of the preform of the map element and display state information of the map element being displayed in the layer. Apparatus and non-transitory computer-readable storage medium counterpart embodiments are also contemplated.

Abstract: The present application discloses a shift-register circuit used as a shift-register unit of current stage including a control sub-circuit coupled to a shift-register unit of previous stage and configured to recharge a pull-up node of the shift-register unit of previous stage during a touch-control operation performed after a gate line scanning of previous stage ends and before the gate line scanning of current stage starts. The control sub-circuit is further configured to compensate an internal voltage of the shift-register unit of previous stage before the touch-control operation ends so that the shift-register unit of previous stage is triggered to perform the gate line scanning of previous stage followed by the shift-register unit of current stage to perform the gate line scanning of current stage.

Abstract: A thin film transistor and a manufacturing method thereof, an array substrate and a display device are provided. The thin film transistor includes a first electrode, a gate electrode, an active layer, a source/drain electrode and a second electrode. The source/drain electrode is connected with the active layer, the first electrode is provided oppositely to the second electrode; the second electrode is provided in the same layer as the source/drain electrode; and the second electrode and the source/drain electrode are formed in a single patterning process.

Abstract: A method for manufacturing an array substrate, including forming a thin film transistor and a peripheral circuit; forming a passivation layer covering at least the thin film transistor and the peripheral circuit; forming a first via hole penetrating the passivation layer and exposing part of a drain of the thin film transistor, and a second via hole penetrating the passivation layer and exposing part of the peripheral circuit; forming a first conductive layer pattern on the passivation layer, the first conductive layer pattern covering the first via hole and the second via hole; forming a reflective metal layer pattern and a second conductive layer pattern on the first conductive layer pattern, the second conductive layer pattern covering the second via hole.

Abstract: The present application discloses a shift-register circuit used as a shift-register unit of current stage including a control sub-circuit coupled to a shift-register unit of previous stage and configured to recharge a pull-up node of the shift-register unit of previous stage during a touch-control operation performed after a gate line scanning of previous stage ends and before the gate line scanning of current stage starts. The control sub-circuit is further configured to compensate an internal voltage of the shift-register unit of previous stage before the touch-control operation ends so that the shift-register unit of previous stage is triggered to perform the gate line scanning of previous stage followed by the shift-register unit of current stage to perform the gate line scanning of current stage.

Abstract: The present disclosure relates to the field of display technology and, in particular, to an input control circuit and an input control circuit method; an input control device; and a display panel. The input control circuit includes an input module configured to transmit an input signal to the pull up node in response to the input signal; an output module configured to transmit a clock signal to the signal output terminal in response to a voltage signal at the pull up node; a driving module configured to transmit a common signal to the common electrode block in response to the voltage signal at the pull up node; a reset module configured to transmit a power signal to the pull up node in response to a reset signal; and a bootstrap capacitor connected between the pull up node and the signal output terminal.

Abstract: A compensation circuit, a gate driving unit, a gate driving method, driving method thereof, and a display device are provided. The compensation circuit includes: a pull-up control node control sub-circuit configured to control a touch ending signal input end to input a touch ending signal to a pull-up control node under the control of a pull-up input end; a pull-up control storage capacitor sub-circuit, a first end of which is connected to the pull-up input end, and a second end of which is connected to the pull-up control node; and a compensation sub-circuit configured to enable the pull-up control node to be electrically connected to the pull-up node voltage output end under the control of the pull-up control node.

Abstract: A compensation circuit, a gate driving unit, a gate driving circuit, driving methods thereof and a display device are provided. The compensation circuit includes: a pull-up node voltage control sub-circuit configured to control a first voltage input end to output a first voltage to a pull-up node voltage output end under the control of a control node; and a control node control sub-circuit configured to control a voltage compensation clock signal input end to input a voltage compensation clock signal to the control node under the control of a pull-up input end, control a second voltage input end to input a second voltage to the control node under the control of a voltage compensation resetting end, and control a touch ending signal input end to input a touch ending signal to the control node under the control of a pull-up node voltage output end.

Abstract: The present disclosure relates to the field of display technology and, in particular, to an input control circuit and an input control circuit method; an input control device; and a display panel. The input control circuit includes an input module configured to transmit an input signal to the pull up node in response to the input signal; an output module configured to transmit a clock signal to the signal output terminal in response to a voltage signal at the pull up node; a driving module configured to transmit a common signal to the common electrode block in response to the voltage signal at the pull up node; a reset module configured to transmit a power signal to the pull up node in response to a reset signal; and a bootstrap capacitor connected between the pull up node and the signal output terminal.

Abstract: A shift register unit, a gate driving circuit and a display device are provided. The shift register unit includes an input sub-circuit, a first output sub-circuit, a second output sub-circuit, an output resetting sub-circuit, a node resetting sub-circuit and a capacitor sub-circuit. A control end of the output resetting sub-circuit is connected to a second reference voltage signal end, so as to provide a second reference voltage signal from the second reference voltage signal end with a rising edge within a relatively short time period.

Abstract: A reset circuit for compensating a level reduction at a first node during a first stage without affecting levels during a second stage includes a reset portion, a reset control portion, and at least three input terminals. The reset portion is coupled to the first and second input terminals, and a second node, and is configured to be turned on if the second node is at a first level, to electrically couple the second and first input terminals. The reset control portion is coupled to the first, second, and third input terminals, and the second node, and is configured to electrically couple the second input terminal with the second node if the first input terminal is at the first level, and to electrically couple the second node with the third input terminal if the second input terminal is at a second level.

Abstract: A compensation circuit, a gate driving unit, a gate driving method, driving method thereof, and a display device are provided. The compensation circuit includes: a pull-up control node control sub-circuit configured to control a touch ending signal input end to input a touch ending signal to a pull-up control node under the control of a pull-up input end; a pull-up control storage capacitor sub-circuit, a first end of which is connected to the pull-up input end, and a second end of which is connected to the pull-up control node; and a compensation sub-circuit configured to enable the pull-up control node to be electrically connected to the pull-up node voltage output end under the control of the pull-up control node.

Abstract: A compensation circuit, a gate driving unit, a gate driving circuit, driving methods thereof and a display device are provided. The compensation circuit includes: a pull-up node voltage control sub-circuit configured to control a first voltage input end to output a first voltage to a pull-up node voltage output end under the control of a control node; and a control node control sub-circuit configured to control a voltage compensation clock signal input end to input a voltage compensation clock signal to the control node under the control of a pull-up input end, control a second voltage input end to input a second voltage to the control node under the control of a voltage compensation resetting end, and control a touch ending signal input end to input a touch ending signal to the control node under the control of a pull-up node voltage output end.

Abstract: The present disclosure provides a gate driving circuit and a display apparatus. The gate driving circuit comprises a plurality of cascaded shift registers, wherein the shift registers each comprise an input sub-circuit, an output sub-circuit, an output de-noising sub-circuit, a capacitor sub-circuit and a reset sub-circuit, wherein the output de-noising sub-circuit is electrically connected to a first reference voltage signal terminal, a second reference voltage signal terminal and an output signal terminal, and for each stage of shift register except for a first stage of shift register, the second reference voltage signal terminal is electrically connected to an input signal terminal of a stage of shift register immediately prior to the current stage of shift register.

Abstract: A shift register unit, a gate driving circuit and a display device are provided. The shift register unit includes an input sub-circuit, a first output sub-circuit, a second output sub-circuit, an output resetting sub-circuit, a node resetting sub-circuit and a capacitor sub-circuit. A control end of the output resetting sub-circuit is connected to a second reference voltage signal end, so as to provide a second reference voltage signal from the second reference voltage signal end with a rising edge within a relatively short time period.

Abstract: The present disclosure discloses an array substrate, a display apparatus and a method for repairing faults of an array substrate, which belong to the field of display technologies. The array substrate comprises: a plurality of touch electrode lines, a plurality of data lines and a plurality of repair lines, wherein the plurality of touch electrode lines are intersected with and insulated from the plurality of data lines and the plurality of repair lines, and a repair line is parallel to a data line. The repair line is connected to parts on both sides of a disconnected position of the data line when the data line is disconnected. In embodiments of the present disclosure, when a data line in the array substrate is disconnected, the disconnected data line may be replaced by a repair line, thereby achieving repairing the disconnected data line and ensuring a display quality and a touch function of a display device.

Abstract: A reset circuit for compensating a level reduction at a first node during a first stage without affecting levels during a second stage includes a reset portion, a reset control portion, and at least three input terminals. The reset portion is coupled to the first and second input terminals, and a second node, and is configured to be turned on if the second node is at a first level, to electrically couple the second and first input terminals. The reset control portion is coupled to the first, second, and third input terminals, and the second node, and is configured to electrically couple the second input terminal with the second node if the first input terminal is at the first level, and to electrically couple the second node with the third input terminal if the second input terminal is at a second level.